Consider the system shown in Figure P6.49, which consists of a 16-bit A/D converter whos...

Consider the system shown in Figure P6.49, which consists of a 16-bit A/D converter whose output is the input to an FIR digital filter that is implemented with 16-bit fixed-point arithmetic.

The impulse response of the digital filter is

This system is implemented with 16-bit two’s-complement arithmetic. The products are rounded to 16-bits before they are accumulated to produce the output. In anticipation of using the linear noise model to analyze this system, we define and where e[n] is the quantization error introduced by the A/D converter and f [n] is the total quantization noise at the output of the filter.

(a) Determine the maximum magnitude of such that no overflow can possibly occur in implementing the digital filter; i.e., determine x_max such that for all −∞ < n < ∞when < x_max for all −∞ < n < ∞.

(b) Draw the linear noise model for the complete system (including the linear noise model of the A/D). Include a detailed flow-graph for the digital filter including all noise sources due to quantization.

(c) Determine the total noise power at the output. Denote this

(d) Determine the power spectrum of the noise at the output of the filter; i.e., determine Φ_ff(e^jω). Plot your result.