Show a complete VHDL design for a circuit that provides the 2’s complement at its output for each 3-bit binary number applied at its input. Use the input signals X, Y, and Z and the corresponding output signals F 1, F 2, and F 3. Hint: The 1’s complement of a binary number is simply the complement of each individual bit. The 2’s complement of a binary number is the 1’s complement of the binary number + 1 (i.e., the 1 is added to the least significant bit).
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