1.FALSE:SRAM:Static Random Access Memory does not need to be
refreshed
2.TRUE,cache memory is used to store the program instructions which
are frequently used,cache memory is faster than Random access
memory
3.FALSE,in set-associative given memory block can be placed in one
of n different locations in the cache.
4.FALSE,The unit of data exchanged between the cache and main
memory is Block size
5.TRUE,cache allocates a new entry and copies data from main
memory
6.TRUE, Virtual memory is created by OS when your computer is
hanging while using bigger software or any other things, it can be
created by combining space in your computer Ram and hard disk
space
7.TRUE,the data which is stored in cache memory fetched from the
main memory so you can find
8.TRUE,as the associativity increases performance will be
decreased
(15pts) Answer each of the following with a TRUE (T) or (1) Data in SRAM will...
A short program loop goes through a 16 kB array one word at a time, reads a number from the array, adds a random number, and stores the result in the corresponding entry in another array that is located in the memory immediately following the first array. An outer loop repeats the above operation 100 times. The 64-bit processor, operating at a clock frequency of 4 GHz, is pipelined, has 48 address lines, three levels of caches with a 64...
Question 9 Which of the following statements is true about memory system? Put the answer in the box. A. Cache memories are usually built by SRAMs, which have higher density and faster access speed than DRAM-based main memories. B. Secondary storages such as hard disk drive and solid-state drive are typically volatile memories. C. Compared to the associative cache mapping function, direct mapping function has more flexibility. D. Due to locality of reference, the basic transfer unit between cache and...
1. (4 pt) Circle True or False. Each is 2 pts. t Recently Used (LRU) replacement policy generates better miss penalty than FIFO for fully- associative caches ngger b me rna 2. (8 pt) Find the Average Memory Access Time (AMAT) for a machine with following configuration: The machine has the hit rate of 95% with the hit time of 2 ns. A miss costs 30 ns to fetch the desired ume that the read and write miss penalties are...
Each of the following questions is either True or False. Place a T (True) if the answer is True on the answer sheet beside the question; otherwise place a F (False) if the answer is False on the answer sheet beside the question. 21. Variable-length instructions are easier to decode than fixed-length instructions. T F 22. Fixed-length instructions always have the same number of operands. T F 23. The two types of cache write policies are write-through and write-back. T F 24. When...
T F Xilinx's SDK assembler supports both FOR statements, but not wHILE statements T F In the ARM processor, immediate operands are stored in data memory, and not in the opcode T F In ARM processor instructions, one but not both operands can come from main T F In the ARM processor, a single load/store instruction T F It is possible for a microprocessor to use a virtual TCache memory is typically much faster and much larger than main memory...
1 Overview The goal of this assignment is to help you understand caches better. You are required to write a cache simulator using the C programming language. The programs have to run on iLab machines. We are providing real program memory traces as input to your cache simulator. The format and structure of the memory traces are described below. We will not give you improperly formatted files. You can assume all your input files will be in proper format as...