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10. Design an n-bit shift and add multiplier. Validate the designed multiplier using the following (SM) numbers A=1 1 1 1 and B=1 101 where A is the multiplicand and B is the multiplier.

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n-bit shift and add multiplier

.n-AL s ·st and add multipli乢 Multi Ca n-i 知- AW LSB roduct Wm

Clow chait T. CLSB) Add multipli roduch erY nth 7

Multiplication of A=1111 and B=1101 where A is the multiplicand and B is the multiplier

Product register Multiplier register(B) Multiplicand register(A)
0000 0000 1101 0000 1111
0000 1111 0110 0001 1110
0000 1111 0011 0011 1100
0100 1011 0001 0111 1000
1100 0011 0000 1111 0000

Explanation: The Product register is first initialized with 0000 0000. The least significant bit(LSB) of Multiplier register(B) i.e. bit 0 is checked. If the LSB of Multiplier register is 1 then the Multiplicand and Product register added together in ALU and result is stored back in the Product register then the Multiplicand register is left shift by 1 and the Multiplier register is right shift by 1. If the LSB of Multiplier register is 0 then the Multiplicand register is left shift by 1 and the Multiplier register is right shift by 1, the Product register remain unchanged. This continues n-times i.e the size of the Multiplier register. The final result is stored in the Product register.

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