Question

3) Complete the following table for design of an array multiplier that multiplies two binary numbers (AxB+C+D), C & D are 4-bit binary numbers. (Use Full Adder blocks in your design) Co AB+AC+BC S = A B C & td (Gate) 1ns Number of Number of Stages Number of Ах В Process Time for Multiplier AND gates Full Adders Зx4 бх6 8x4 4x8 5x6

Answer 1

3. Solutien:- ao aa ao B b3 bib,bo C aL as 4-bitacer Produc AB For 4bi muttiplicafion, resuicd 46 Nand Jatu are each adde Corresponds to 2qate delay adder Coresponds- to ųx2-8 andt reuires 3 amd hence a 4-bt 4 bit tuu ate dea E 12 -uu adders. 3x4 adaen time procen 32x2 To ta 24 (addler delay) -27ry .

for 3x4 No 0f Nand gates 2X3 2 bit -fuli adders No 0f -fuil adders :4 u adden Procen time - & 2. For 6X6: No of NAD 9ates 3x 39 . ND O Fut -Adder 2 3bit -fuu adders :6-fuu adoCrs Procen tme = 2 : I 44 n 72- For 8X4 NO 0f NAND garcs 2 4x3 12. fuu addCrs 2 ub ul acden No of f.c, -fuLu adac r s- tme Procen For ux No of NAND ga tis 3A 12 MJ fo'oN adden - 3 bit Jul adden full adclen Hme Proeen 3 21n For Sx6:- NO.O NAND Jates 3x 3 ADO of Fui ^dcCi - 2 3 bit -uu adcert 6 -fu adder e tme 14ns Proces
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