Question

The A/D converter with the specifications listed below is to be used in an environment in which the A/D converter temperature may change by +10°C. Estimate the contributions of conversion and quantization errors to the uncertainty in the digital representation of an analogue voltage by the convertor. EFSR 0-10V Linearity Temperature drift 12 bits 3 bits bit/ 5°C

Answer 1

Ans

Given data:

E_{​​​​​​ FSR} = 0-10 V

M. = 12 bits

​Linearity Error = (+ or -) 3 bits

Temperature drift error = 1 bit /5° c

We can estimate a design-stage uncertainty ( u_{​​​​​d}​​​​​ )_E :

(u​​​​​d )E =√(u​​0 ​​​2+u​​​​​​c 2)

Where:

u_{​​​​​​0} = uncertainty zero-order

Q = E_{​​​​​​FSR}​​ /2¹²

= 10/2¹²

Q = 2.4 mv

The resoultior of a 12 bit A/D converter with full-stage range of 0 to 12 bit (Q) = 2.4 mv

So that the quantization error provides an estimate for the zero-order uncertainty as u_{​​​​​​0}​​​

u_{​​​​​​0} = 1/2 Q = 0.5×2.4 mv= 1.2 mv

Calculate conversion errors:

Linearity conversion = u_{​​​​​​2}​​​​​ = 3 bits×2.4 mv

u_{​​​​​​2}​​​​ = 7.2 mv

Temperature uncertainty = u_{​​​​​​3} =1 bit ×10°c× 2.4 mv

u_{​​​​​​3} = 4.8 mv (5° =1 bit so 10° = 2 bit)

From above calculations calculate resulting conversion error:

u_{​​​​​​C} = √(u_{​​​​​​2} ²+u_{​​​​​​3} ²)

= √((7.2 mv)²+(4.8mv)²)

u_{​​​​​​c} = 8.6 mv

The combined uncertainty in the digital represention of an analogue value due to these uncertainty is defined as

(u_{​​​​​​d})_E = √((1.2 mv)²+(8.6 mv)²)

=( + or - ) 8.7 mV (assume 95%)

The effect of the conversion error dominate the uncertainty

A go-no go decision regarding this planned system can be made based on result.

Thanks for given this opportunity