Question

need help on some review of a RLC circuit.

fig. a lice c Vekt) A vet) R=4002 =1,274 c=1.25 uf lert fig. b A sea venting switching 2nd order ckt can be modled when the gate function Shown in fy b is applied to the parallel LLC ckt shown in Fig a Veo)=5v & i (o)=0A a.) find b.) find ilt) & vlts for oftasoms ilsoms), visoms), & dils & dicsoms) c.) find itts & vlt) for ts 50mg d.) Use Pspice to verify your answer. Use a VPNL gource to create the non-periodic signal Volt) as shown in fig b & apety it to the parallel RLC ckt in figa. Plot Volt) & ult) in the same graph. Plot ilt) in a seperate graph. Inside VPWL, use the following parameters to generate vast): Table 1 Generating Vs T1 T2 T3 T4 Looolm som 50.00lm vi V2 V3 V4 Also set initial condition of the capacitor to ste Set intial condition of the indretur to on. The simulation run time should be looms long with - a max step size of lous.

better?

thats the part i need help on

Answer 1

u given sitter is (see) to os (a) find it and alt for ost<50 ms given ilo) = DA V(O) = 5 volte Lai - Vic) at 7'(0)= V(o) 534 UCH = level kel: initie

KVL : (H = R + VC V, H R Le dice+ un dillu) + Rich apply haplaie transforms Y(S)= Rhe f$30 -sif631 (0)3 -hds[(sy) - 1(0)3+R (5) () = 400 x 10257x1667 57 (5) -5(0)-4} : +1-25 { SI(57-03 +400260 =160465X 106341-35+4003 -2500X166 101)= 140 + $500 x104) (625x106)8°+1•0355+ 400 +250ms Vg (H) = 16 4(5) = 16 1139- 167(406) . + 4 s(57 20005+ (8001) 5720005 tooo)

hill 8=128 wy iur -1600 16001 -0.047338-9004 1A)= 0.04 +0.00133 (b) (50 ml) isoned - 004 +0.00133 boot = 0.04 +0.00332-4600(10x103) -0.041334 400/50x3) [ 7 0.0399 Amps] @somosul (C) for t750my 463) = 0 I(s) = 2500x106 (625x7o6x5* +1-295+400) $ 420005+(8007 - - - -40 33xelsort - 40o elk .[As Az 16001 ei toot A+B=100) 1600A + YOOB