Question

Part IV: Diode Rectifiers Procedure: 1. Build the circuit model for full-wave diode rectifier in PSpice as shown in Fig. 4. The value of the load resistor is 10 k22. The input AC voltage source (VSIN in PSpice) is configured at 100 Hz and 20 V (peak-to- peak) in sinusoidal waveform. O 10K V.(t) V(A) A Figure 4. Circuit configuration for full-wave diode rectifier 2. Run the simulation and save the input and output voltage waveforms V and V. Compare the peak voltage values as well. Instruction: in the menu bar, Analysis => setup => transient, then fill the table. Print step: 0.01 ms; Final time: 150 ms; No-print delay: 100 ms; Step ceiling: 0.01 ms. 3. Repeat step 1 and 2 with a 50 uF capacitor in parallel to the load resistor Explain the difference of output voltage waveform V. in step 2 and 3.

done on pspice thank you

Answer 1

Draft2 Vin002)-V(n003) Vn001) 10V- 8V- 6v- 4- 2- ov -2V- 41- -6V- -8V -1017 Oms 10ms 20ms 30ms 40ms 50ms 60ms 70ms 80ms 90ms 100ms 110ms 120ms 130ms 140ms 150ms Draft2 R1 x 108 < 10k .tran 150ms

Draft2 V(n002)-V(n003) Vin001) 10V- 8- 6V 4- 2v- ov 2V- 40- -6- -814 -100+ Oms 40ms 80ms Draft2 >10k 50

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- > t valho A ( with out Capacitor) Xt Now with Capacith - trots during positive half cycle Di&Da on (E) Dz & P: F - wo ih= Vilts a during this time capacith charges to maximum voltage when negitive Cycle of win Gorres Vects = - Vinos Now Capacitó Starts discharging. this process gry Very slowly. when noch reaches max value again Capacit& starts changing this process Contratos again and again ( if Capacita valve is high, we cannot ctieve nipples at output) Vich Geko) Ac discharges tan - ripples.