Question

CMOS VTC (10) hursday, July 05, 2012 2:47 PM 20 1 |vTNwTPalV-W/L=1/1 for NMOS, 2/1 fo r PMOS. KP=20? for NMOS, and 101A/V2 forPMOS.VDD- 1) Is the CMOS design symmetric or 2) For an input voltage of 3V, draw NMOS and PMOs currents as a function of Vout, labet points of transitor saturation with current and voltage values. Indicate approximate location of the actual CMOS inverter output voltage in the previous step. 3)

Answer 1