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2. Use the 3-bit block cipher in the table below to answer the following. Suppose the...
the w 2. This problem explores the use of a one-time pad version of t In...
the w 2. This problem explores the use of a one-time pad version of t In this scheme, the key is a stream of random numbers between 0 and example, if the key is 3 19 5..., then the first letter of plaintext is encrypted with a shift of 3 letters, the second with a shift of 19 letters, the third with a shift of 5 letters, and so on. a. Encrypt the plaintext sendmoremoney with the key stream 9...
Write a program that implements an elementary bit stream cipher. An elementary level bit stream cipher...
Write a program that implements an elementary bit stream cipher. An elementary level bit stream cipher is an encryption algorithm that encrypts 1 byte of plain text at a time. This one uses a given 4-bit bit pattern as the key. The size of the encrypted message that we want to be able to send has a maximum length of 200 characters. You must: 1. prompt the user to input the clear text to be encrypted. You must use printf()...
in VHDL Show synthesizable VHDL code for a register unit that performs operations shown below. The unit has a 3-bit mod...
in VHDL
Show synthesizable VHDL code for a register unit that performs operations shown below. The unit has a 3-bit mode (md) input, an asynchronous reset (rs) input, a 1-bit output control (oc) input, and an 8-bit bi-directional io bus. The internal register drives the io bus when oc is ‘I, and md is not “11 1". Use std-logic. md-000: does nothing md-001: right shift the register md-010: left shift the register md 011: up count, binary md-100: down count,...
Finite state machine (FSM) counter design: Gray codes have a useful property in that consecutive numbers differ in only a single bit position. Table 1 lists a 3-bit modulo 8 Gray code representing the...
Finite state machine (FSM) counter design: Gray
codes have a useful property in that consecutive numbers differ in
only a single bit position. Table 1 lists a 3-bit modulo 8 Gray
code representing the numbers 0 to 7. Design a 3-bit modulo 8 Gray
code counter FSM.
a) First design and sketch a 3-bit modulo 8 Gray code counter
FSM with no inputs and three outputs, the 3-bit signal
Q2:0. (A modulo N counter counts from 0 to N −...
1) Echo the input: First, you should make sure you can write a program and have...
1) Echo the input: First, you should make sure you can write a program and have it compile and run, take input and give output. So to start you should just echo the input. This means you should prompt the user for the plaintext, read it in and then print it back out, with a message such as "this is the plaintext you entered:". [4 points, for writing a working program, echoing the input and submitting the program on the...
You will use Quartus II to build an 8 bit arithmetic logic unit that performs the...
You will use Quartus II to build an 8 bit arithmetic logic unit that performs the following functions: Control Value Function 000 Copy In1 to theResult unchanged 001 Copy In2 to theResult unchanged 010 Add In1 to In2 011 Subtract In2 from In1 100 And In1 and In2 101 Or In1 and In2 110 Shift left In1 by 1 bit 111 Shift right In1 by 1 bit You are allowed to use either gates/logic schematic, or else Verilog. We suggest...
**DO IT AS PYTHON PLEASE** The Trifid Cipher General Problem Description The Trifid cipher (not to be confused with the...
**DO IT AS PYTHON PLEASE**
The Trifid Cipher General Problem Description The Trifid cipher (not to be confused with the creatures from the classic science-fiction film "The Day of the Triffids") is an algorithm that enciphers a plaintext message by encoding each letter as a three-digit number and then breaking up and rearranging the digits from each letter's encoded form. For this assignment, you will create a set of Python functions that can encode messages using this cipher (these functions...
Use a behavioral Verilog model to design a 3-bit fault tolerant up-down counter. For each flip-fl...
Use a behavioral Verilog model to design a 3-bit fault tolerant up-down counter. For each flip-flop (FF) include asynchronous reset and preset signals. Refer to Example 4.3 on page 160 for an example of a single FF with both reset and preset signals as well as with an enable signal. For this project, you don't need to use FFs with enables. You don't also need not-q (nq) in this assignment. Use active-high signals for reset and present signals. The example...
the w 2. This problem explores the use of a one-time pad version of t In this scheme, the key is a stream of random numbers between 0 and example, if the key is 3 19 5..., then the first letter of plaintext is encrypted with a shift of 3 letters, the second with a shift of 19 letters, the third with a shift of 5 letters, and so on. a. Encrypt the plaintext sendmoremoney with the key stream 9...
Write a program that implements an elementary bit stream cipher. An elementary level bit stream cipher is an encryption algorithm that encrypts 1 byte of plain text at a time. This one uses a given 4-bit bit pattern as the key. The size of the encrypted message that we want to be able to send has a maximum length of 200 characters. You must: 1. prompt the user to input the clear text to be encrypted. You must use printf()...
in VHDL
Show synthesizable VHDL code for a register unit that performs operations shown below. The unit has a 3-bit mode (md) input, an asynchronous reset (rs) input, a 1-bit output control (oc) input, and an 8-bit bi-directional io bus. The internal register drives the io bus when oc is ‘I, and md is not “11 1". Use std-logic. md-000: does nothing md-001: right shift the register md-010: left shift the register md 011: up count, binary md-100: down count,...
Finite state machine (FSM) counter design: Gray
codes have a useful property in that consecutive numbers differ in
only a single bit position. Table 1 lists a 3-bit modulo 8 Gray
code representing the numbers 0 to 7. Design a 3-bit modulo 8 Gray
code counter FSM.
a) First design and sketch a 3-bit modulo 8 Gray code counter
FSM with no inputs and three outputs, the 3-bit signal
Q2:0. (A modulo N counter counts from 0 to N −...
**DO IT AS PYTHON PLEASE**
The Trifid Cipher General Problem Description The Trifid cipher (not to be confused with the creatures from the classic science-fiction film "The Day of the Triffids") is an algorithm that enciphers a plaintext message by encoding each letter as a three-digit number and then breaking up and rearranging the digits from each letter's encoded form. For this assignment, you will create a set of Python functions that can encode messages using this cipher (these functions...
Use a behavioral Verilog model to design a 3-bit fault tolerant up-down counter. For each flip-flop (FF) include asynchronous reset and preset signals. Refer to Example 4.3 on page 160 for an example of a single FF with both reset and preset signals as well as with an enable signal. For this project, you don't need to use FFs with enables. You don't also need not-q (nq) in this assignment. Use active-high signals for reset and present signals. The example...
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