Question

The page table holds The physical address of the virtual pages O The physical offset of the virtual pages o The physical page number of the virtual pages O None of the above Question 2 Select all that apply Virtual memory is A method to enable games to create virtual spaces Amethod to use all the RAM in the computer A technique that allows to speedup the processor A technique that enables multiprocessing A method to asign each process with its own address space A technique that allows to use the various levels of storage in the computer transparently Question 3 A control hazard is a condition in which the next instruction cannot be executed in the next clock cycle because O The functional unit for the next instruction is busy O The next instruction is not known O The data for the next instruction is not ready O None of the above Question 4 Miss Rate is o The fraction of memory accesses found in a particular level of the hierarchy o The fraction of memory accesses not found in a particular level of the hierarchy o The minimum unit of information present (or not) in a level of memory. O None of the above

0 0
Add a comment Improve this question Transcribed image text
Answer #1

1. It holds Physical page number of virtual pages. Option C
2. A techniue that allows us to speed up the processor Option. C
3. The data for the next instruction is not ready. Option C
4. The fraction of memory accesses not found in a particular level of the Hirerarhy. Option B

Add a comment
Know the answer?
Add Answer to:
The page table holds The physical address of the virtual pages The physical offset of the...
Your Answer:

Post as a guest

Your Name:

What's your source?

Earn Coins

Coins can be redeemed for fabulous gifts.

Not the answer you're looking for? Ask your own homework help question. Our experts will answer your question WITHIN MINUTES for Free.
Similar Homework Help Questions
  • For part A: convert the virtual address into page numbers and offset, and then into hexadecimal...

    For part A: convert the virtual address into page numbers and offset, and then into hexadecimal numbers. Redraw the page table showing which pages were referenced and in any needed to be loaded into memory and what frame was selected. Assume frames 6,7,11,and 12 are available. 9.22 The page table shown in Figure 9.32 is for a system with 16-bit virtual and physical addresscs and with 4,096-byte pages. The reference bit is been referenced. Periodically, a thread zeroes out all...

  • Exercise l: Suppose that we have a virtual memory space of 28 bytes for a given process and physical memory of 4 page frames. There is no cache. Suppose that pages are 32 bytes in length. 1) How...

    Exercise l: Suppose that we have a virtual memory space of 28 bytes for a given process and physical memory of 4 page frames. There is no cache. Suppose that pages are 32 bytes in length. 1) How many bits the virtual address contain? How many bits the physical address contain? bs Suppose now that some pages from the process have been brought into main memory as shown in the following figure: Virtual memory Physical memory Page table Frame #...

  • 11. In a paged virtual memory system, can the computer 's physical memory address space be...

    11. In a paged virtual memory system, can the computer 's physical memory address space be larger than a process's virtual memory address space? Explain your answer. (Note: A computer 's "physical memory address space" is the number of bits for the frame number plus the number of bits foir the offset. A process's "virtual memory address space" is the number of bits for a page number plus the number of bits for the offset.)

  • 1) Given a virtual memory system with: virtual address 36 bits physical address 32 bits 32KB...

    1) Given a virtual memory system with: virtual address 36 bits physical address 32 bits 32KB pages (15 bit page offset) Each page table entry has bits for valid, execute, read and dirty (4 bits total) and bits for a physical page number. a) How many bits in the page table? (do not answer in bytes!) Three digit accuracy is good enough. The exponent may be either a power of 2 or a power of 10. b) The virtual address...

  • Consider the page table shown below for a system with 16-bit virtual and physical addresses and...

    Consider the page table shown below for a system with 16-bit virtual and physical addresses and with 4096-byte pages. All numbers below are given in hexadecimal. (A dash for a page frame indicates that the page is not in memory.) Page Number Physical Frame Number 0 - 1 2 2 C 3 A 4 - 5 4 6 3 7 - 8 B 9 0 How many bits are in the offset part of the address? How many hex digits...

  • construction of a physical address, page tables are stored in a special cache calied a A....

    construction of a physical address, page tables are stored in a special cache calied a A. Page translation lookup table 8 Translation look aside buffer C. Set associative address cache D. Page table associative block A system that uses virtual addresses contains a special 1P block to construct and manage address A. Memory Management Unit B. Rapid Address Constructor Unit ALU bypass Address Generator D. All the above E. None of the above peripheral devices connected to the ARM are...

  • A computer system has a 36-bit virtual address space with a page size of 8K, and...

    A computer system has a 36-bit virtual address space with a page size of 8K, and 4 bytes per page table entry. How many pages are in the virtual address space? What is the maximum size of addressable physical memory in this system? If the average process size is 8GB, would you use a one-level, two-level, or three-level page table? Why? Compute the average size of a page table in part c above

  • As described in 5.7, virtual memory uses a page table to track the mapping of virtual...

    As described in 5.7, virtual memory uses a page table to track the mapping of virtual addresses to the physical addresses. This exercise shows how this table must be updated as addresses are accessed. The following data constitutes a stream of virtual addresses as seen on a system. Assume 4 KiB pages, a 4-entry fully associative TLB, and true LRU replacement. If pages must be brought in from disk, increment the next largest page number. 4669, 2227, 13916, 34587, 48870,...

  • A computer uses a byte-addressable virtual memory system with a four-entry TLB and a page table...

    A computer uses a byte-addressable virtual memory system with a four-entry TLB and a page table for a process P. Pages are 16 bytes in size. Main memory contains 8 frames and the page table contains 16 entries. a. How many bits are required for a virtual address? b. How many bits are required for a physical address?

  • 1) The following page table illustrates a system with 12-bit virtual and physical addresses and 256-byte...

    1) The following page table illustrates a system with 12-bit virtual and physical addresses and 256-byte pages. Free page frames are to be allocated in the order9 F, D. A dash for a page frame indicates that the page is not in memory. (4 points) Page Page-Frame 0x4 OxB 0 2 4 0x2 0x0 0xC 7 Convert the following virtual addresses to their equivalent physical addresses irn hexadecimal. All numbers are given in hexadecimal. In the case of a page...

ADVERTISEMENT
Free Homework Help App
Download From Google Play
Scan Your Homework
to Get Instant Free Answers
Need Online Homework Help?
Ask a Question
Get Answers For Free
Most questions answered within 3 hours.
ADVERTISEMENT
ADVERTISEMENT
ADVERTISEMENT