Question

Please , draw the logic diagram or schematics for each implementation(D ,T, JK l flip-flops), according the state table below.

Clearly show K-maps used

Indicate the GIC for each of the implementation and make a comment on the best implementation.

presen states Q2 QO next states Q2' Q1' QO' D flip-flops D2 D1 DO T flip-flops T2 T1 TO TÒ J flip-flops J1 K1 JO 12 KO 0 0 0 0 0 0 0 0 0 0 0 loo 0 K2 X X X 1 0 1 0 0 1 1 0 1 0 0 0 х X X 1 0 0 1 0 1 0 o 1 0 1 0 0 1 0 1 0 0 o 0 0 0 0 0 0 X 0 0 0 1 0 0 0 0 1 X X х X X X 0 1 1 ol 1 1 1 1 1 0 0 1 0 0 1 1 0 0 1 1 1 1 1 х х X 0 X X X X o OOF o 1 0 0 1 0 0 0 0 0 0 1 0 1 0 0 0 0 х 0 0 0 0 0 1 0 0 X X X 0 0 o 0 0 0 0 0 U 1 1 X X 1 0 1 0 0 0 0 U 1 1 0 1 0 0 1 0 U 0 0 1 X x X 1 0 0 1 POOPOPO o o o 1 1 1 1 1 1 1 0 0 X 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 X Х х 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 Х х 1 1 0 0 0 1 X х 1 1 0 0 0 X X 0 0 X X X 1 х Х х 0 X 0 X X Х. х X х 0 1 1 х х х 0 х X 0 0 Х х х х х х х х х 0 X X X х х 0 х х х 1 0 1 0 0

Answer 1

Flip Flop o प . 0 1 1 D 1 1 1 1 D D क o 1 प' D

D flip flop can be implemented using above truth table ...

As next state is equal to D , so it can be implemented as following...

Flip flop. D. De PD G

Similarly we can implement T flip flop as following...

Date Page I Flip Flop T Q 0 a o I o I

C 누 I to - FBtGT T 4

So we have found the next state expression for T flip flop as shown above ...

After that we can implement it using logic as follow--

I Flip Flop & T D ल CIK D ६

Now it turn for J K flip flop--+

Page IX Flip Flopa J K G Q a D o 0 } 1 1 0 - 1 1 1 1 1 1 1 1 1- 1 С

रम ka K K4 ज O 4 A J 1 (A 1. G EQ + I -

Truth table for JK is shown above ...

Implementing expression for next state we get following--

Page КУмр -ҒАор — 3 CIK

D flip flop can be implemented best because it's input does not depends on the initial state of output , so it will have less propagation delay ...

Output is simply the input provided in that clock cycle-- in case of D flip flop...