A) 5 points : Using a suitable size ROM, design a Hex to Gray code converter...
A) 5 points : Using a suitable size ROM, design a Hex
to Gray code converter circuit. What is the size of ROM
required?
Insert solution ( handwriting)
B) Using a PLA, Design a circuit that implements the following
functions:
F1(a,b,c)=sum(0,1,4,6,7)
F2(a,b,c)=sum(1,2,3,5)
Insert solution ( handwriting)
Homework Answers
Add Answer to:
A) 5 points : Using a suitable size ROM, design a Hex
to Gray code converter...
Design and implement a 4 bit- binary to gray code converter using CMOS transistors. ...
Design and implement a 4 bit- binary to gray code converter using CMOS transistors. (30 Marks) (Note: Students are expected to design the circuit with truth table, solve the output expression (by use of K Map or suitable circuit Reduction technique) and implement using CMOS transistors.)
Design and implement a 4 bit- gray to binary code converter using CMOS transistors. (Note: Students are expected to design the circuit with truth table, solve the output expression (by...
Design and implement a 4 bit- gray to binary code converter using CMOS transistors. (Note: Students are expected to design the circuit with truth table, solve the output expression (by use of K Map or suitable circuit Reduction technique) and implement using CMOS transistors.)
Logic Design Course assignment: Construct the truth table for 3 bit binary-to-Gray code converter. Use K-map...
Logic Design Course assignment: Construct the truth table for 3 bit binary-to-Gray code converter. Use K-map for simplification and draw the circuit for Binary-to-Gray code Converter using AND, OR and Not gates in logisim Simulator.
Having the next Boolean functions: F1(x,y,z)-П (1, 3, 5) . F2(x,y,z)-Σ (0, 2, 4, 5) . 1. Make one...
Computer architecture
Having the next Boolean functions: F1(x,y,z)-П (1, 3, 5) . F2(x,y,z)-Σ (0, 2, 4, 5) . 1. Make one logic gate design circuit, using AND, OR and NOT logic gates (20 points). 2. Design two 4-to-1 selectors, one for each Boolean function (20 points) 3. Design one 3-to-8 decoder to solve both Boolean functions (20 points) 4. Design a 8x2 ROM to solve both Boolean functions (20 points) 5. Design a 3x5x2 PLA to solve both Boolean functions...
Exercise 5.6: Generic Binary-to-Gray Converter The regular binary code, which consists of code words ordered according...
Exercise 5.6: Generic Binary-to-Gray Converter The regular binary code, which consists of code words ordered according to their increas ing unsigned decimal values, constitutes the most commonly used digital code. In some kind operation opcode 000 ya+b a(N-1:0) b(N-1:0) a(N-1:0) unsigned ya b 001 y(N- 1:0) Arithmetic Arithmetic 010 y-a+b ya+b+cin y(N:0) b(N-1:0 circuit circuit 011 cout cin cin 100 ya+b signed 101 ya b opcode(2:0) opcode(2:0) 110 y-a+b (a) (b) (c) 111 ya+b+cin Figure 5.14 applications, however, gray code...
Q3) (10 points] Tabulate the truth table of an 8x4 ROM that implements the following functions:...
Q3) (10 points] Tabulate the truth table of an 8x4 ROM that implements the following functions: F. (A,B,C) = A'B + AC F1 (A,B,C) = A'B'C' +C F2 (A,B,C) = A'B' + AB F3 (A,B,C) = AB + AC + BC F1 F2 F3 Address Fo ABC 000 001 010 011 100 101 110 111
Given four-input Boolean functions, F1 (A,B,C,D) = Σm(4, 5, 10, 11, 12)
Given four-input Boolean functions, F1 (A,B,C,D) = Σm(4, 5, 10, 11, 12) F2 (A,B,C,D) = Σm(0, 1, 3, 4, 8, 11) F3 (A,B,C,D) = Σm(0, 4, 10, 12, 14) (a) Realize F1, F2 and F3 using a ROM. (b) Realize F1, F2 and F3 using a PLA of minimum size. Show the PLA table and location of switches.
QUESTION 2 (40 MARKS) Figure Q2 show Binary to Gray code converter block diagram. Based on...
QUESTION 2 (40 MARKS) Figure Q2 show Binary to Gray code converter block diagram. Based on that figure, design: (a) Circuit using logic gates. Obtain the truth table and represent Yo, Y1, Y2 and Y3 in minimized SOP Boolean algebra term. Draw the circuit using logic gates (CO2:P03 - 20 Marks) (b) Circuit using 8 to 1 Multiplexer with A, B, C as a data selector. Obtain the truth table of each multiplexer. Draw the circuit using 8 to 1...
7. Memory. A ROM chip with a size of 8 words by 4 bits is shown...
7. Memory. A ROM chip with a size of 8 words by 4 bits is shown in the figure below. Please use this ROM chip, implement the following four logic functions by using the dot-notation. You can mark a dot to indicate that particular cell stores a value of 1. Note: in the following figure, A is the least significant bit of the address input. (10 points) F1= ABC +A C F2= ABC +BC F3= AC + B F4- ABC...
Design an excess-3 code converter to drive a seven-segment indicator
Design an excess-3 code converter to drive a seven-segment indicator. The four inputs to the converter circuit A, B, C, and Dasin Figure belowrepresent an excess-3 coded decimal digit. Assume that only input combinations representing the digits 0 through 9 can occur as inputs, so that the six unused combinations are don’tcares. Design your circuit using only two-, three-, and four-input NAND gates and inverters. Minimize the number of gates and invertersrequired.ThevariablesA,B,C,and Dwill be availablefromtoggle switches.
Computer architecture
Having the next Boolean functions: F1(x,y,z)-П (1, 3, 5) . F2(x,y,z)-Σ (0, 2, 4, 5) . 1. Make one logic gate design circuit, using AND, OR and NOT logic gates (20 points). 2. Design two 4-to-1 selectors, one for each Boolean function (20 points) 3. Design one 3-to-8 decoder to solve both Boolean functions (20 points) 4. Design a 8x2 ROM to solve both Boolean functions (20 points) 5. Design a 3x5x2 PLA to solve both Boolean functions...
Exercise 5.6: Generic Binary-to-Gray Converter The regular binary code, which consists of code words ordered according to their increas ing unsigned decimal values, constitutes the most commonly used digital code. In some kind operation opcode 000 ya+b a(N-1:0) b(N-1:0) a(N-1:0) unsigned ya b 001 y(N- 1:0) Arithmetic Arithmetic 010 y-a+b ya+b+cin y(N:0) b(N-1:0 circuit circuit 011 cout cin cin 100 ya+b signed 101 ya b opcode(2:0) opcode(2:0) 110 y-a+b (a) (b) (c) 111 ya+b+cin Figure 5.14 applications, however, gray code...
Q3) (10 points] Tabulate the truth table of an 8x4 ROM that implements the following functions: F. (A,B,C) = A'B + AC F1 (A,B,C) = A'B'C' +C F2 (A,B,C) = A'B' + AB F3 (A,B,C) = AB + AC + BC F1 F2 F3 Address Fo ABC 000 001 010 011 100 101 110 111
QUESTION 2 (40 MARKS) Figure Q2 show Binary to Gray code converter block diagram. Based on that figure, design: (a) Circuit using logic gates. Obtain the truth table and represent Yo, Y1, Y2 and Y3 in minimized SOP Boolean algebra term. Draw the circuit using logic gates (CO2:P03 - 20 Marks) (b) Circuit using 8 to 1 Multiplexer with A, B, C as a data selector. Obtain the truth table of each multiplexer. Draw the circuit using 8 to 1...
7. Memory. A ROM chip with a size of 8 words by 4 bits is shown in the figure below. Please use this ROM chip, implement the following four logic functions by using the dot-notation. You can mark a dot to indicate that particular cell stores a value of 1. Note: in the following figure, A is the least significant bit of the address input. (10 points) F1= ABC +A C F2= ABC +BC F3= AC + B F4- ABC...
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