Question

QUESTION 2 (40 MARKS) Figure Q2 show Binary to Gray code converter block diagram. Based on that figure, design: (a) Circuit using logic gates. Obtain the truth table and represent Yo, Y1, Y2 and Y3 in minimized SOP Boolean algebra term. Draw the circuit using logic gates (CO2:P03 - 20 Marks) (b) Circuit using 8 to 1 Multiplexer with A, B, C as a data selector. Obtain the truth table of each multiplexer. Draw the circuit using 8 to 1 Multiplexer. (CO2:PO3 - 20 Marks) (MSB) A Binary Yo (MSB) B To Y Gray Code с Y2 Convertor (LSB) D Y: (LSB) Figure Q2: Binary to Gray Code Convertor

Answer 1

Binary to Gray code Converter TolmB) (msega Binary y Gray code Converter SUB) رانا) Binary wode Graycode ABC D Yosy 3 3 o 0 0 0 с 0 с с 1 0 o 1 с o со O I) olo 1 1 0 0 ) 010) O 0 0 I OO 1 10) I'll 110 lo 10 lo 1 loo lolo 10 l 1 1 0 Tool looo

kmal Хя, Чә АС | 0 о с | 0 о 1 1 yo- ABT AB д (+) = А к m47 от 9, о - п о о \\ 1 = ĀBTAB = AB 1) \о AB — о ) 1 o1 О 1 С 10 9. – gt + ВС – ВЫС

ч 41 493 ОО 1 — о о о — 1. ОТО о — who ср+ с) : C D logic circait A Я - у, B - 9, С 5. 7 Р -

from truth table in rast @ Touth table fch multiplexer ne output to al = 9 lo 12 IS 0 You 11 Thath table for multiplex ☺ie gletput , 3 D 5 12 5 9 C D Truth table for multiplenel 23 de outlet To I I 1 3 4 ۱۱۱ B 0 0 1 1 с here D as data inpet & AB, C as select lines

Truth table for seg se multiplexed 3 In Ili © १ 2 5 P P A o ۱۱۱۹ 1 o = ! 0 0 1 1 logic circuit using 8x1 mux 1 2 28x4 yo 13 na + - 8X) Mux ICBA 8x1 mux 8x)