Question

please solve this ASAP

4. (2.5pt) Latches A. (PDF) Implement a D flip-flop using 2 Dlatches without any SR nor SR latches, by drawing the circuit diagram by hand. (1pt) I B. Consider the standard latch implementation using logical gates as we've covered in class, discuss whether this alternative implementation is superior to the D-SR master-slave implementation approach in the box below. (0.5pt)

Answer 1

SR and a D first difference Between Latch SR ( set- Reset imput s R Latch) output pl g Hold That is an invalid state for which the catch can't function (as it should). The D. flip flop using D-latch remove ruegal input latch doesnt go is an innalid State such possiblety of O 0 0 30 D 1 Sitis) 1 0 Invalid slate 4) Do Resi(R) D flip flop using 2 I latches [ 1st Cleft one) is acting Masker and right one is slave] gate with chip numbers are written in Legend input В D D Latch F D Output mput (single input with Enable CD B B D 0 Hold CIK (enable) O 1 0 (not) & TE 1 1 1 A 7404 Not And (inwester (not gate) need to B 7408 (2 input And he won't work if we add Reset Bit D * Enable u NOR c- 7402 (2 Nor gate) generally alk I need NAND inplace of NOR 3 imput gales for this ) Ruct C) with reset Bit Reset D a Blaren 28 so lets answer B past first how flip flop using better (supenor to SR master stave) Please see that in SR Latch there is an allegal when both stR are high (1) D DO D ED -Reset input cast Teacher's Signature Reset