7. A computer has a memory space of 8 GB.
a) How many address lines are required to span this address space, assuming it is byte-addressed?
b) This computer has a block of 2 GB 32-bit-wide memory built using 512 MB static RAM chips that are each 8 bits wide. How many RAM chips are required to implement the memory?
7. A computer has a memory space of 8 GB. a) How many address lines are...
A computer has a memory space of 16 GB. a) How many address lines are required to span this address space, assuming it is byte- addressed? b) This computer has a block of 4 GB 32-bit-wide memory built using 512 MB static RAM chips that are each 8 bits wide. How many RAM chips are required to implement the memory?
Question 3. A computer has a memory space of 16 GB. a) How many address lines are required to span this address space, assuming it is byte- addressed? b) This computer has a block of 4 GB 32-bit-wide memory built using 512 MB static RAM chips that are each 8 bits wide. How many RAM chips are required to implement the memory?
Memory organization a) Suppose that a 32MB system memory is built from 32 1MB RAM chips. How many address lines are needed to select one of the memory chips? Suppose a system has a byte-addressable memory size of 4GB. How many bits are required for each address? Suppose that a system uses 16-bit memory words and its memory built from 32 1Mx 8 RAM chips. How large, in words, is the memory on this system? Suppose that a system uses...
a) A memory unit has 28-bit address lines and 64-bit input/output data lines. How many bytes of data can this memory hold? How many words does it contain, and how large is each word? b) A memory unit consists of 32M words of 16-bit each. How many bits wide address lines and input-output data lines are needed to access this memory? c) A memory unit consists of 512K bytes of data. How many bits wide address lines are needed to...
Problem #1 (25 points) Address Space, Memory Consider a hypothetical 18-bit processor called HYP18 with all registers, including PC and SP, being 18 bits long. The smallest addressable unit in memory is an 8-bit byte. A. (4 points) What is the size of HYP18's address space in bytes and KB? How many address lines does HYP18 require? Address space: Bytes Address space: KB (KiloBytes). Address bus lines: B. (6 points) Assume that first quarter of the address space is dedicated...
7. In a cache system we have the following attributes: 4 GB of DRAM 256 MB of physical memory space 2 MB of cache IKB per cache line Determine number of lines in cache. a) Determine the number of address bits out of the processor. b) c) Determine the number of bits needed for the block offset section of the address. If our cache is 8-way set associative, how many sets are there in the cache? d) How many bits...
Exercise 5 (2.5 points) Assume a memory management system built on paging, its physical memory has the total size of 4 GB. It placed over 16 KB pages. The limit of the logical address space for each process is 512 MB. 1. What is the total number of bits in the physical address? 2. What is the number of bits that specifies the page displacement? 3. Determine how many physical frames in the system. Explain the layout for the logical...
How many address lines are needed for memory with 512 locations? How many bits are present in 4k x 8 SARM IC?
Virtual memory address translation: a) Consider a machine with a physical memory of 8 GB, a page size of 4 KB, and a page table entry size of 4 bytes. How many levels of page tables would be required to map a 52-bit virtual address space if every page table fits into a single page? b) Without a cache or TLB, how many memory operations are required to read or write a page in physical memory? c) How much physical...
Given: 2 MB of physical R/W memory, composed of multiple 256KB chips, a CPU with a 21 bit address bus and an 8 bit data bus. Answer the following questions. h. (1 pt) Suppose I replaced the 256K RAM chip at the highest address, with a 256K EPROM chip, what would the address be of the lowest byte in the EPROM? Given: 2 MB of physical R/W memory, composed of multiple 256KB chips, a CPU with a 21 bit address...