A simple paging system has a memory size of 256 bytes and a page size of 16 bytes.
i. What is the size of the page table?
ii. How many bits exist for an address, assuming 1-byte incremental addressing?
iii. State p and d values (i.e. the page number and the offset).
iv. Perform address translation of 64 bytes to physical address space using the page table below.
0 8
1 6
2 3
3 11
4 7
memory size of 256 bytes = 28 // 8 bits needed to represent memory address
page size of 16 bytes = 24 // 4 bits needed to represent offset
<..................... 8 bit memory address...............................>
Page Number (p= 4 bit) | Page offset (d = 4 bits) |
i. What is the size of the page table:
No of entry in page tabe = 2p= 24
Page Table Size = No of entry in page tabe * Entry size
Page Table Size = (24 * 1 ) byte
Page Table Size = 16 byte
ii. How many bits exist for an address, assuming 1-byte incremental addressing?
Answer : 8 bit address
memory size of 256 bytes = 28 // 8 bits exist for an address // (assuming 1-byte incremental addressing)
iii. State p and d values (i.e. the page number and the
offset).
iv. Perform address translation of 64 bytes to physical address space using the page table below.
Page Table | |
Entry Number | Frame Number |
0 | 8 |
1 | 6 |
2 | 3 |
3 | 11 |
4 | 7 |
PageNumber = 0100 // means go to entry 4 of page table and take Frame number 7
Offset = 0000
Now go to Frame Number 7 and after that take offset (d= 0000) to go to entry 0000 within frame 7 (111)
So Physical address: <Frame number,page offset>
A simple paging system has a memory size of 256 bytes and a page size of...
A simple paging system has a memory size of 256 bytes and a page size of 16 bytes. i. What is the size of the page table? ii. How many bits exist for an address, assuming 1-byte incremental addressing? iii. State p and d values (i.e. the page number and the offset). iv. Perform address translation of 64 bytes to physical address space using the page table below. 0 8 1 6 2 3 3 11 4 7
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