Question

Address Translation Question

[8 points] Suppose a computing system uses paging with a logical address of 24 bits and a
physical address of 32 bits. The page size is 4KB. Answer each of the following. If an answer is a power of 2, you can leave it in the form of a power of 2. ...

2. [20 points] Memory address translation and TLB performance [8 points] Suppose a computing system uses paging with a logica

0 0
Add a comment Improve this question Transcribed image text
Answer #1

2. a .

1) The size of virtual address space is 224

The size of virtual address space is calculated as, 2x by considering that system is byte addressable .

2) The size of physical address space is 232

The size of physical address space is calculated as, 2x by considering that system is byte addressable .

3) The number of bits for offset is 12 bits

The number of bits of offset is calculated as, page size 4K= 212

4) The number of bits of page number is 12 bits

Bits of page number is calculated as, logical address bits - page number bits , therefore 24-12=12

5) Number of bits for frame number is 20 bits

Bits of frame number is calculated as, physical address bits - page number bits , therefore 32-12=20 bits

Add a comment
Know the answer?
Add Answer to:
Address Translation Question [8 points] Suppose a computing system uses paging with a logical add...
Your Answer:

Post as a guest

Your Name:

What's your source?

Earn Coins

Coins can be redeemed for fabulous gifts.

Not the answer you're looking for? Ask your own homework help question. Our experts will answer your question WITHIN MINUTES for Free.
Similar Homework Help Questions
  • 6) Paging [26 pts] Suppose you have a computer system with a 38-bit logical address, page size of 16K, and 4 bytes per...

    6) Paging [26 pts] Suppose you have a computer system with a 38-bit logical address, page size of 16K, and 4 bytes per page table entry a) How many pages are there in the logical address space? Suppose we use two level paging and each page table can fit completely in a frame. [4 pts] How many pages? [2 pts] Show your calculations here: b) For the above-mentioned system, give the breakup of logical address bits clearly indicating number of...

  • 7 pts Question 30 Consider a computer system that uses virtual memory with paging with a...

    7 pts Question 30 Consider a computer system that uses virtual memory with paging with a TLB. Suppose main memory access time is 10 ns and the time to look up the TLB 1 ns. Assume no page faults and the TLB has a hit of 95%. What is the effective memory access time (express in ns) 11ns

  • Question 30 7 pts Consider a computer system that uses virtual memory with paging with a...

    Question 30 7 pts Consider a computer system that uses virtual memory with paging with a TUB. Suppose main memory access time is 10 ns and the time to look up the TLB 1 ns. Assume no page faults and the TLB has a hit of 95%. What is the effective memory access time (express in ns)

  • 1) Given a virtual memory system with: virtual address 36 bits physical address 32 bits 32KB...

    1) Given a virtual memory system with: virtual address 36 bits physical address 32 bits 32KB pages (15 bit page offset) Each page table entry has bits for valid, execute, read and dirty (4 bits total) and bits for a physical page number. a) How many bits in the page table? (do not answer in bytes!) Three digit accuracy is good enough. The exponent may be either a power of 2 or a power of 10. b) The virtual address...

  • Number Name 3. Assuming no page fault on a page table access, what is the processor...

    Number Name 3. Assuming no page fault on a page table access, what is the processor memory access time for the system depicted in the above figure, for a physical memory with 50ns read/write times? 4. Now, assume that the memory system has a translation look-aside buffer (TLB). The TLB requires 10 ns to determine a hit or mess. The physical memory system has an access time of 50ns. You may assume that page fault rate for the application is...

  • 2. In the paging system, assume that the logic address space is 28 and the size...

    2. In the paging system, assume that the logic address space is 28 and the size of a page is 32B a) What is the format of the logical/virtual address? b) Given the following page table Page number Frame number 0 4 4 6 0 Please convert the following logical address into physical address OxFF 0x86 0xA3

  • A computer uses virtual memory implemented by paging. The TLB lookup takes 100 ns and the...

    A computer uses virtual memory implemented by paging. The TLB lookup takes 100 ns and the update takes 200 ns. The PT lookup takes 1 µs and the update takes 2 µs. Loading a word from main memory onto the CPU takes 10 µs and loading a page from the disk into main memory takes 10 ms. The TLB hit ratio is 0.4 and the main memory hit ratio is 0.3. Compute the average access time for a referenced word:...

  • 2. A computer uses virtual memory implemented by paging. The TLB lookup takes 150 ns and...

    2. A computer uses virtual memory implemented by paging. The TLB lookup takes 150 ns and the update takes 300 ns. The PT lookup takes 2 us and the update takes 4 us. Loading a word from main memory onto the CPU takes 25 us and loading a page from the disk into main memory takes 20 ms. The TLB hit ratio is 0.3 and the main memory hit ratio is 0.4. Compute the average access time for a referenced...

  • 3. Virtual Memory (20 points) An ISA supports an 8 bit, byte-addressable virtual address space. The...

    3. Virtual Memory (20 points) An ISA supports an 8 bit, byte-addressable virtual address space. The corresponding physical memory has only 256 bytes. Each page contains 32 bytes. A simple, one-level translation scheme is used and the page table resides in physical memory. The initial contents of the frames of physical memory are shown below. VALUE address size 8 bit byte addressable each byte of addressing type memory has its own address 32 B page size physical memory size 256...

  • Please answer the following questions about paged memory... A) How much space needs to be allocated...

    Please answer the following questions about paged memory... A) How much space needs to be allocated in the minimum and maximum cases for a two-level page table for a machine with a 32-bit virtual memory address, a 1K page size, and which has four times as many inner pages as outer pages? Assume any stored page table value requires 32 bits. B) For the two-level paging approach above, if a Translation Lookaside Buffer (TLB) is used and can cache both...

ADVERTISEMENT
Free Homework Help App
Download From Google Play
Scan Your Homework
to Get Instant Free Answers
Need Online Homework Help?
Ask a Question
Get Answers For Free
Most questions answered within 3 hours.
ADVERTISEMENT
ADVERTISEMENT
ADVERTISEMENT