Question

For error detection in a 3 bit data (XYZ):

a) Design an odd parity generator.

b) Design an odd parity checker

Answer 1

a) Steps to design an odd parity generator:

Step1.Generate Truth Table with three inputs and one output

Step 2.Get minimised expression from truth table using K-Map

Step 3.Design circuite

step1:

3-bit message Odd parity bit generator (P) 0 0 0 0 0 0 0 0 0

step2:

BC 00 01 10 (00 01

Expression is:

Exprewon AABC +ABC+ ABC A BC +ABC ABC+ ABC ĀC. B@c) +A. C BBC)

Step:3

Steps to design an odd parity checker :

Step1.Generate Truth Table with four inputs and one output

Step 2.Get minimised expression from truth table using K-Map

Step 3.Design circuite

step1:

4-bit received message Parity error check Cp 기 0 0 0 0 0 0 기 : 기 0 기 0 : 기 : 기 1 :

step2:

CP 00 01 10 2 0 01 頁) 0 ]l 12 13 15 14 0 1 0 9 10 0

Expression: (AOB) O (COp)