Question

a. Analyze the following MIPS code and find out what exactly it is doing. Explaining what each MIPS instruction does literally is not enough, you need to explain how it contributes to the overall logic. (4 Marks) adddu $t1, $t2, $t3 nor $4, $t2, Szero situ St5, St4, St3 bne St5, Szero, exception1_processing What is the specific exception that is being processed at the label exception1_processing?

Answer 1

This MIPS code works as follows:

1. The first instruction stores t2 + t3 in t1.
2. The nor instruction stores t2' in t4
3. The sltu instruction stores 1 in t5 if t4 < t3
4. Finally, it checks if the value of t5 is 1 and then branches to exception1_processing.

Since we set t5 = 1 if t4 < t3 and t4 = t2', we have

t5 = 1 $\iff t2' < t3$

And we branch to processing exception, if

Hence the given code checks for this exception and moves to the label to process this exception.

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