Question

Preparation (Pre-lab) Before coming to the first lab session, complete the following tasks: Generate a truth table showing inputs vs outputs for the following circuit blocks in Part I: Comparator, Circuit A, and Circuit B. o Use the truth tables to produce minimized SOP (sum of products) for the Comparator, Circuit A and Circuit B.

Answer 1

We have to design the circuits for the comparator, circuit A and circuit B. From the given table in the question, the comparator checks if the input is greater than 9. That means if the input is greater than 9 the output z will be 1. Here the muxes have also been used. The output of mux depends on the select line. If the select line is 0 then the input at 0 port will be transmitted to the output, and if the select line is 1 the input at 1 will be transmitted to the output. The truth table of the comparator is given below. The inputs are V3, V2, V1 and V0. The output is z.

Table & usa. O o - 0 - 0 - 0 - 0 - 0 o Touth output = 1, if Comparatore ...D - - ? - - 0 0 - - sooo 0 - - - - o Deo :--- oo 0 0 - - -

For ciruit A, the muxes take the output of circuit A when the input is greater than nine. This is because the output of the comparator is used as the select line for the muxes and the output of A is conected at the 1 port of the muxes. From the table given in the question we can see that for input greater than 9 the output of A is going to the 7 segment decoder. The circuit has three inputs V2, V1 and V0 and three outputs. The truth table for the circuit A is shown below. when input is 010 output should be 000 for getting 0 on the 7 segment display. Similarly when input is 011 output should be 001 for getting 1 on the 7 segment display. Accordingly the truth table is written.

of Foce Circuit Ai- af 9 - The output will be taken by the 1 . Teuth Ciceauit A Muni Table of Mux digit Binary Value 20 1010 Toll 11.00 Toi 으일 llio TRUTH TABLE OF A W2. V, vo rooox x Txodon't care o i olo o ooOo-- > 10 - - Do CRX 000o-- XX 0-0-0- cocoa

For circuit B, the input is Z, the output of the comparator and the output is 7 bit for the 7 segment display. When input is 0 output should be zero and when input is 1 output should be 1 on the 7 segment display. The truth table for cicuit B is given below:

Touth Table fore Circuit B input =z, output = di [6:0] = a b c d e fg » Common-anode < 7- Segment display. 3 active lows on. active high = off. Iz labcdefg oooooo Tooiiij

For finding SoP (sum of products) we have to take the product of inputs when output is one and OR eah product. For minimiization Karnaugh map is used. When don't cares come they are used only for reduction of ones and are not considered if they are associated with a one.

Minimized op face the comparatore ? From the truth table: z = V₂ Zz Vito + vg J V, Vox V3. " 2 T To + ugye vi vo + V₂ Vq V, Jo + V3 Y 2 Y Yo Using Kacenough man's Vz 2 l vo (AB) 00 01 ooo lololo Minimized From the sop jace truth Circuit By table Ow

Minimized sop fore circuit A From tawth table : Using Kannaugh man:- foce Azi w.to vi Loo 0 1 10 olx XL 0 Tol a 100CD r V. I Brest easy Don't cares are not considened you A, v lv X XO Ao :- VYVO 00 011 와 이 A = Vo

The schematic for the comparator, circuit A nad circuit B are shown below according to the minimized SoP expression:

Schematic foce comparcaton A ist 2 = vs [w: +vo) ] Schematic Ciuenit As - Az = A, svi

Seheneatic foce Circuit B 0 a=Z (o) b=0 (1) -Cro (2) d=z (3) -e=z (4) F= 2 15) q=1 (6) - 9