Question

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All applicable work must be shown to receive full credit on any homework assignment *** ***PLACE BOXES AROUND FINAL ANSWERS*** 3. [10 Points) A set of 74ALS174 registers is connected as shown below. a. What type of data transfer is performed? b. Determine the output of each register when the MR is pulsed momentarily low and after each of the indicated clock pulses (CP#) in the table below. GLK DS DE DO DP DI DO DS DE DO TALS14 TALS174 os os Q 01 00 05 01 03 00 01 00 www.wiwi DS 1 DO CP 06 De todo TALS14 TALS174 MA 05 04 03 02 01 00 os o O Q 01 00 + CLK MR 15-10 WS-WO X5 X6 Y5-YO 25-Zo 0 1 1 1 х CP1 CP2 CP3 CP4 CPS CP6 CP7 CP8 101010 101010 010101 000111 111000 011011 001101 000000 000000 1 1 1 c. How many clock pulses must be applied before data that are input on 1510 are available at ZS-zo? CET 2113 - Digital Systems 2 Homework - IC Registers, Shift Register Counters [40 Points] 2

Answer 1

a) Parallel Input Parallel Output Data Transfer happens in 74ALS174 register.

b)

Note:

=0, all the 74ALS174 register outputs resets to 000000

ni

=1, all the parallel inputs of 74ALS174 register moves to its output

ni

Clk	ni	I5 - I0	W5-W0	X5-X0	Y5-Y0	Z5-Z0
X	0	101010	000000	000000	000000	000000
CP1	1	101010	101010	000000	000000	000000
CP2	1	010101	010101	101010	000000	000000
CP3	1	000111	000111	010101	101010	000000
CP4	1	111000	111000	000111	010101	101010
CP5	1	011011	011011	111000	000111	010101
CP6	1	001101	001101	011011	111000	000111
CP7	1	000000	000000	001101	011011	111000
CP8	1	000000	000000	000000	001101	011011

We can observe that after each clockpulse , all the six bits move from one 74ALS174 register to the next in the order of W5-W0 to X5 - X0 to Y5 - Y0 to Z5 - Z0

C) Input from I5-I0 needs four clock pulses to reach Z5-Z0