Question

Section 14.3: The CMOS Inverter 14.31 Consider a CMOS inverter fabricated in a 65-nm CMOS process for which VppV, VVp 0.35 V, and ?? Car-2.5MyCar-470 ??/V'. In addition, QN and QP have L = 65 nm and (WIL), 1.5. (a) Find W, that results in V Vpp/2. What is the silicon area utilized by the inverter in this case? (b) For the matched case in (a), find the values of Vo, VoL ,VIL, NM,, and NM (c) For the matched case in (a), find the output resistance of the inverter in each of its two states

Answer 1

14-31 Sol'- 65nm İ.g invester, fabsi con Cx 97-43.TS mm 二243.75 nm Silicon ea CA 47S+ 243.75 ES v, Hー+0.DS?SU VIL: 0.4625V

(c) Find o/p Yesįgfơ of invester Stafea . o/p xeetetance tn the hiegh Sfote