Question

2. External Interrupts: a. What interrupts are activated by the following sequence: (2) EIMSK = 0x02 b. Write the necessary settings to make the above interrupts trigger on the rising edge of the signal. (2)

Answer 1

a). The EIMSK or the External Interrupt Mask Register is used to activate an interrupt. The configuration of the bits of the register is shown below:

7 6 5 4 3 2 1 0

INT 7

INT 6

INT 5

INT 4

INT 3

INT 2

INT 1

INT 0

If any interrupt needs to be activated then the bit associated with that particular interrupt is set as"1". For example if INT 0 or interrupt 0 needs to activated then bit 0 of the EIMSK register is set as 1.

When EIMSK=0x02 is executed , considering that global interrupt is already enabled (If global interrupt is not enabled then interrupt will not take place), then the status of EIMSK register is as shown below:

7 6 5 4 3 2 1 0

0

0

0

0

0

0

1

0

It means bit 1 is set as "1" Therefore INT 1 is activated.

b). Type of signal that activates a given Interrupt is defined by Interrupt Sense Control (ISCn0 and ISCn1) where n is the interrupt number. The ISC status is controlled by the bits of External Control Register A (ECRA) for INT0-3 and External Control Register B (ECRB) for INT 4-7. For the interrupt to be triggered on the rising edge of the signal ISCn1 and ISCn0 both need to be "1".

In this case we need to trigger INT 1 on rising edge of signal therefore "n" in this case is 1. Hence we need to use ECRA to control the triggering of the interrupt. The bit configuration of ECRA is as below:

7 6 5 4 3 2 1 0

ISC 31

ISC 30

ISC 21

ISC 20

ISC 11

ISC 10

ISC 01

ISC 00

we need to set both ISC 11 and ISC 10 to "1". the configuration of ECRA bits will be " 00001100"

Therefore we need to write

ECRA= 0x0C