Question

Did I get the digraim on the left(a) right ? On how the volts travel through the circuit ? And can you please explain the circuit on the right(b) on what p-type & n-type mean?

Explain 2.9 volts Ptype 0 2.1 n-type In Out In Out O volts 2.9 volts 2.9 volts 0 volts 4 A CMOS inverter cuit can be described by means of a table, as shown in Figure 3.4c e 0 volts by the symbol 0 and 2.9 volts by the symbol 1, we have (Figure 3.4d) for the complement or NOT function, which we stud

Answer 1

Solution: Before diving t=into the solution we need to understand how p-mos and n-mos operates.

p-mos :

PMOS is made with the p-type source(S) and drain(D) and an n-type substrate. It carriers the holes (+ or absence of electrons) when a high-voltage(Logic 1) is applied to the gate, PMOS will not conduct.

When a low voltage(0) is applied in the gate, PMOS will conduct.

n-mos:

NMOS is made with n-type source(S) and drain(D) and a p-type substrate, it's carriers are electrons

When a high voltage is applied to the gate, NMOS will conduct

When a low voltage is applied in the gate, NMOS will not conduct

Hence keeping this in mind, when logic 0 is applied to the Gate of n-mos and p-mos, and 2.9V(Logic 1) to the source, pmos behaved like a wire (conducting) whereas n-mos behaved like an open switch. Hence whatever the volavoltagelied at the source(S) reflected as an output because it was the only shortest path to flow.

When Logic 1 will be applied to both the gates and 2.9 V to the Source (S) then p-mos will behave like an open switch hence Source current won't get a path to flow in any direction and output will be observed as logic 0.

Note: If you have any doubt then please do comment below, I will try my level best to make you understand, before giving a negative feedback, please do comment. If you understood then don't forget to give a positive feedback.