Question

please help solve 1 and 2

Problem 1 (20 pts). A semiconductor company has the following costs associated with Product X: Fixed cost of $500M (S500,000,000) Die yield of 75% (75% of dies on a wafer make it to the next level) 12-inch wafer manufacturing cost of S5,000 per wafer (assume wafer yield of100%) - Die size 12mmx12mrm - Testing and packaging cost of S3 per die A final test yield of 85% Product volume of 1B (1,000,000,000) chips a) What is the cost per IC (considering both fixed and variable costs)? b) Suppose that you are a strategic planner for this company and you need to reduce the cost to make profit. Which one is a better strategy? The answers should be quantitatively justified to get credit! Strategy 1: Reduce the fixed operating cost by 10%, with a potential reduction in volume which is negligible. Strategy 2: Spend an extra Research and Development cost of S400,000,000 to improve the die yield from 75% to 80%. Problem 2 (20 pts). Draw the circuit diagram (transistor level) to implement the following boolcan functions using 2-input NAND gates and inverters. (a) Exclusive NOR: y = ab + ā5, (b) Exclusive OR: y=ab + āb

Answer 1

(a) fixed cost $ soo x1 Wala hz-2 inch x 12 inch Die size= 12mm x12mm 2. (254) 645 - .' ND 484 2066 116 033 XIO 0キ Total tat. t lo TO tal cost 3x10 Cest 3-83 xID 5% inc.unein die y e規ラ

ID y8 L.e, a reducn oL 12813 to 10 , ie, fon 2066116 to 1937934 516 640 x 10 = OXIO