Write Verilog code for a counter with T flip‐flops that goes through the following binary repeated sequence: 0, 1, 3, 7, 6, 4.

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Question

Write Verilog code for a counter with T flip‐flops that goes through the following binary repeated sequence: 0, 1, 3, 7, 6, 4.

Write verilog code for a counter with t flip flop that goes through binary sequence 0,1,3,7,6,4

Kindly give me this verilog code till today night

T-Flip-Flop Sequence-0 1 Verilog-Code 3 7 6 4

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Answer 1

Answer #1

Find the state diagram of the counter as below:

that counts from 0,1,3,7,6,4 and repeat.

find the state table as below:

flip flop input is derived from excitation table of T flip flop, and from present state and next state.

Qn	Qn+1	T-i/p
0	0	0
0	1	1
1	0	1
1	1	0

if present state is 0 and next state is 1 than T flip flop input must be 1.

if present state is 1 and next state is 0 than T flip flop input must be 1.

if present state is 1 and next state is 1 than T flip flop input must be 0.

if present state is 0 and next state is 0 than T flip flop input must be 0.

From state table find the inputs of T in form of Present state.

T2 = Q2'Q1Q0 + Q2Q1'Q0'

T1 = Q2'Q1'Q0 + Q2Q1Q0'

T0 = Q2'Q1'Q0' + Q2Q1Q0

Find the circuit diagram as below:

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Answer 2

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Write Verilog code for a counter with T flip‐flops that goes through the following binary repeated sequence: 0, 1, 3, 7, 6, 4.

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Write Verilog code for a counter with T flip‐flops that goes through the following binary repeated sequence: 0, 1, 3, 7, 6, 4.