Question

Please show all work legibly and thanks so much for the explanation! Really really need help with part B), mostly. Thank you!

P5 (15 points): Consider the multiplication of Y - 3X. We want to create a FSM that will produce the bits of Y given X from least-significant bit to most-significant bit A: First, design a circuit that will multiply a four-bit X by 3 to produce Y You can use only Full Adders to implement this circuit, Note that this circuit should not be implemented as an FSM vet. B: Modify the Mealy FSM serial adder circuit (figure 6.43 from the book) to design a circuit that sequentially calculates Y - 3X. The value of X is now stored in a shift register and each bit will be input serially into the circuit via an input x. Your circuit should contain only one Full Adder and only two DFFs. The output y is now only one-bit that will produce the full value of Y one-bit at a time.

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Answer 1