mov EAX, [EBX * 4 + 030]
value at EBX = 0x000000a1
Here 30 is in decimal
30 in hexadecimal = 0x1E
Address = (0x000000a1)*4 + 0x1E
Address = (0000 0000 0000 0000 0000 0000 1010 0001)<<2 +
0x1E
Address = (0000 0000 0000 0000 0000 0010 1000 0100) + 0x1E
Address = 0x00000284 + 0x1E
Address = 0x000002A2
memory address loaded into EAX = 0x000002A2
According to Intel syntax, what memory address is loaded into EAX: (use 8-digit hex format to...
Assembly Memory Segment Layout (Little Endian) - What does the
"add" instruction do?For example, on the first add instruction (add eax, 3), it moves
the pointer for eax 3 spots to the right.Thus, EAX = 12, 17, A3, 00. (This I understand)But, on the second add instruction (add ebx, 5), it actually
adds the value 5 to ebx, making EBX = 12, 17, A3, 05.Why is that?ANSWER:varl var2 var3 dd 179 db 0A3h, 017h 012h bca var1 eax. mov add...
Assembly Code
may I get an explanation for the 3 parts in this question
Given that . Ar is a label at address 510 EAX has the value 139 . EBX has the value 102 Which bytes in memory will be accessed by the instruction movl $Ar + 38, %ecx Write your answer in the form startByteEndByte with no space in between. If memory is NOT accessed write -1 for your answer. For example, if your answer was bytes 527...
1. Assume that you are given values in eax, ebx, ecx. Write an assembly code that does the following: eax = (ecx + edx ) - (eax + ebx) 2. Write a piece of code that copies the number inside al to ch. Example: Assume that Initially eax = 0x15DBCB19. At the end of your code ecx = 0x00001900. Your code must be as efficient as possible. 3. You are given eax = 0x5. Write one line of code in...
14. In the code from Question 12 true is: A. a constant B. a variable C. Initialized data D. none of these 15. In the code from Question 12 true and false are: A. useless B. necessary for the display C. check if the contents of the eax and ex registers are the same D. help with indirect addressing 16. Assume that some of the memory looks as shown in the following table: Address Content Label Content Ox1A2B Initial Ox1A2C...
Assembly questions 1. Each of the 8 32-bit general purpose registers in the 80x86 family contains 8 16 bit registers, and 8 8 bit registers. True or false? 2. When we need to see if a math operation resulted in a zero answer, we may use: a. ESP b. keyboard latch c. memory address bus d. EFLAGS 3. The operation: add (radius, eax) ; a. changes the contents of radius. b. changes the contents...
2. A computer uses a memory with addresses of 8 bits. (What's the size of the MM?) This computer has a 16-byte cache with 4 bytes per block. (How many blocks in the cache?) The computer accesses a number of memory locations throughout the course of running a program. Suppose this computer uses direct-mapped cache. a. What's the format of a memory address as seen by the cache ? Tag ? bits Block ? bits Offset ? bits b. The...
Use the following data declarations. Assume that the offset of byteVal is 00000000: data byteValsbyte 1,2,3,ffh dwordVal dword 34567890h, 90785634h, 12346745h Show the value of the final destination operand after each of the following code fragments has executed:(If any instruction/s is invalid, indicate "INV" as the answer and briefly explain why) a.mov edi, 2 answer al mov al, (byte Val + edi) b.mov ebx, dwordVal+4 answer ebx - [esi).- (show your answer in liteedim mov esi, offset dwordVal+8 xchg ebx,...
please show your steps and note that question 2 has a
byte address of 000002 not 000000.
thanks
Hex Viewer Case Study to be used for questions 1: Review this excerpt from a hex viewer. You can assume that all data shown is in hex. You can assume that two's complement is used to store signed integers with a 16-bit architecture which is byte addressable. Refer to this excerpt to answer the questions below: 000000 8A00 8E00 CFA1 48BF 7900...
Anyone explain to (i), (ii)
How can we get the instruction words and R8=?[hex]?
(i) instruction words[hex] is 0x4508, and R8= 0xF002
How can I get that?
(ii) instruction words[hex] is 0x4548 and R8=0x0002
How can I get that?
Consider the following instructions given in the table below. For each instruction determine its length (in words), the instruction words (in hexadecimal), source operand addressing mode, and the content of register R7 after execution of each instruction. Fill in the empty...
What is the address format on a 32‐bit address, 256KB (note the B), 4-way, 8 words per block cache?