Convert the following C++ code to ANNA. Assume “a” is in register r2 and “b” is in register r3. (10
points)
int a = 1;
int b = 1;
while (a < 5){
b = b + a;
a++;
}
Convert the following C++ code to ANNA. Assume “a” is in register r2 and “b” is...
Given the following C Code segment convert it to ARM assembly. Assume the following register assignment have been made before your section of code begins. C Variable Register assignment r1 y r2 r3 r10 j r11 int x=0, y=0, z=0; int main() { for (int i = 0; i<10; i++) for (int j 0; j < 20; j++) if (i* j > 100) X++; if (i j >= 15) y++; + فہه Z = X + y; }
C2. Convert the following c-code to MIPS code. The base memory address of the array a is 0x8000_400C, which must be loaded in the base register Ss0. Register assignments: int a[10]; while (i !- 10) 1 if ( i%2 == 0) a[i] = i * 2; else ail - i* 3 i++i
C2. Convert the following c-code to MIPS code. The base memory address of the array a is 0x8000_400C, which must be loaded in the base register Ss0. Register...
C3. Convert the following C-code to MIPS code. [Use register $al for the variable i, temporary registers for other values, and load the base memory address of the array OxA0000080 to Şao] int i i int array [101; for (i= 0; i<5 ; i=i+1 ) { [i+1] [i] 8; * array = array
C3. Convert the following C-code to MIPS code. [Use register $al for the variable i, temporary registers for other values, and load the base memory address of...
its
brr[8]
(40%) Convert the following C-pseudo code into MIPS assembly code as a standalone program (including main and all the required directives). You can use any register. You must comply, however, with the convention of register usage. Before writing your code perform an explicit register allocation phase. Note that the C snippet is int arr[8]; int brr[4]-{1, 2, 3, 4, 5, 6, 7, 8) int i-8; while (i>-0) arrli]-brr[i-); (40%) Convert the following C-pseudo code into MIPS assembly code...
B2. Convert the C code to MIPS assembly with only 2 efficient instructions: Register assignment: timer-v0 int timer = 0x0AC8 0001; B3. Write MIPS assembly code segment for the following C code snippet for (i - 0, i < 100; i++) -array Register assignment: i-) $ao Base of array -> $s0 array [ i+1] [i] / 2;
B2. Convert the C code to MIPS assembly with only 2 efficient instructions: Register assignment: timer-v0 int timer = 0x0AC8 0001; B3. Write...
2. a)Write the ARM ALP conditional code snippet for the following statements written in C-language. Assume R1 to Rn as06 variables Let R1, R2, R3 contain the starting addresses of arrays X, Y and Z respectively Use Register R4 for variable i. Display appropriate messages. While (i+10) else Z[i] XiYi; b)i Write a program to display a message "This is an examination Question" on the screen using 06 a function sub program Note the following Address of the string to...
1. Convert the following C statement to MIPS code. Assume x, y and z are assigned to registers $s0, $s1 and $s2 respectively and the starting address of array A is $s6. x = y + z + A[3] 2. 2.Convert the following C statement to MIPS code. Assume the base address of array A is $s3 and h is assigned to register $s2 . A[7] = h + A[7]
convert C to LEGv8
(an example given below)
Q1 [15] Convert the following C code to LEG. Assume the following variable/register assignments: Base of A i X19 X20 int main { long long int A[6] = {1, 2, e, e, e, e}; for unsigned int i = 0; i < { A[i+2] myFunction (A[ i] , A[i+1] ); } return 0 } 4; i+ //convert to LEG //convert to LEG //convert the entire myFunction to LEG long long int myFunction...
1. Compile the following C program using the most effective DLX code, similar to the example given in the class. int A[200], B[200], C[200]; ..... for(i=0;i<200;i++) A[i]=B[i]+C[i]*5; Assume array A, B and C each starts at memory location x1000, x2000 and x3000, respectively. You will need to establish each of these addresses in a register (use r1, r2 and r3 for each of the three) before the loop. Also, you need to establish a counter register for “i” (use r4)...
Consider the following operations: A B- C The corresponding assembly code instruction list generated by a compiler are 1 load [%r0 +4], %r1 2 load [%r0 + 8], %r2 3 sub %r1, %r2,%r3 4 load [ZrO + 12], %r4 5 add %r3, %r4 , %r5 6 store %r3, [%r0 + 16] 7 store %r5, [%r0 + 20] a) Identify the potential pipeline hazards. (10 points) b) State if the found hazards can be eliminated and if so propose a scheme...