Implement the following functions with the indicated multiplexers and control inputs.
1. f(P,Q,R) = (P' + Q')R', 8:1 multiplexer
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Implement the following functions with the indicated multiplexers and control inputs. 1. f(P,Q,R) = (P' +...
(a) The truth table below shows a certain function
F(P,Q,R,S).
Implement the function F using an 8:1 multiplexer, without any
other logic gate. Only the constants 0 and 1, and the literals (but
not their complements) are available.
Fill in the inputs in the multiplexer diagram.
(b). Implement the function F
using a 24 decoder and a 4:1 multiplexer, and at most one logic
gate. Only the constants 0 and 1, and the literals (but not their
complements) are available....
I. Implement a 8 to 1 multiplexer from 2 to 1 multiplexers
Implement the function R = ab'h' + bch' + eg'h + fgh using *only* 2-to-1 multiplexers. Use the 2-to-1 multiplexer VHDL description from Problem 1 as a component to write VHDL code for the circuit design of function R. Perform CAD simulation of your design. (60)
Use only 2-to-1 multiplexers to implement the circuit for the following function: F(A, B, C) = Pi M (1, 2, 4, 5) Assume the inverse of each input variable is available, (i.e., you can directly use the inverse of each input variable A, B, or C, in your answer.) Repeat P7, but this time using only one 4-to-1 multiplexer.
Represent the following logic function using only 2:1 multiplexers. Use as few multiplexers as possible. All multiplexer data inputs must be coming from another mux or be a logic 1 or a logic zero. f = a'bc + ad + b'c + a'd + e
Implement the function given below using each of the following methods ?(?, ?, ?, ?) = P (0,1,3,4,7,9,13,15) ∙ ?(5,14) As few 16-1 multiplexers as possible. One 8-1 multiplexer, inverters, and a few 2-1 multiplexers. One 4-1 multiplexer and a few 2-1 multiplexers As few 2-1 multiplexers and inverters as possible.
There are two multiplexers in the following circuit. The three ports A, B, C are inputs, and s) uput(1) Write a truth table for the logic function Y F(A, B, C) of the following cirouit (2) ne inimized Boolean equation for the logic function. B C 01 10 ground P. (5 pts). Use a decoder to implement the following Boolean logic function: Y= AB+AC. Draw schematic of your circuit.
1) Implement the function given below using each of the following methods: ?(?, ?, ?, ?) = P (0,1,3,4,7,9,13,15) ∙ ?(5,14) As few 16-1 multiplexers as possible. One 8-1 multiplexer, inverters, and a few 2-1 multiplexers. One 4-1 multiplexer and a few 2-1 multiplexers As few 2-1 multiplexers and inverters as possible. 2) Write a Verilog module and testbench for a 3:1 multiplexer that implements the following function. You can use “case”, “if” or “assign” statements. Grades will be agnostic...
4 BIT ALU due 4/24 Midnight Implement a 4 bit ALU as covered in class. INPUTS: A – 4 bit 2’s complement number B – 4 bit 2’s complement number Control – determines ALU functionality OUTPUT: If control = 00, then output = A AND B If control = 01, then output = A OR B If control = 10, then output = A ADD B If control = 11, then output = A SUBTRACT B REQUIREMENTS: 1) You are...
1.12.5 marks Design a combinational circuit (using two 8-to-1 multiplexers) with three inputs, and one output to implement the following function 12 13 14 15 Note: the answer will be shown hand written on the same figures in the next page. No need for EWB. A I 15 Note: the answer will be shown hand written on the same figures in the next page. No need for EWB. GND C 74151 74151
1.12.5 marks Design a combinational circuit (using two...