Implement MOD-8 parallel up counter using JK Flip flop. Show table for five clock pulses in the report, the report should contain Circuit equation, circuit diagram, pin configuration, and required equipment list.
MOD-8 Parallel counter is a synchronous counter with 8 distinct states.
Hence 3 bits binary representation ins needed.
State Table
PRESENT STATE |
NEXT STATE |
JK FLIP FLOP EXCITATION INPUT |
|||||||||
Q2 |
Q1 |
Q0 |
Q2+ |
Q1+ |
Q0+ |
J2 |
K2 |
J1 |
K1 |
J0 |
K0 |
0 |
0 |
0 |
0 |
0 |
1 |
0 |
X |
0 |
X |
1 |
X |
0 |
0 |
1 |
0 |
1 |
0 |
0 |
X |
1 |
X |
X |
1 |
0 |
1 |
0 |
0 |
1 |
1 |
0 |
X |
X |
0 |
1 |
X |
0 |
1 |
1 |
1 |
0 |
0 |
1 |
X |
X |
1 |
X |
1 |
1 |
0 |
0 |
1 |
0 |
1 |
X |
0 |
0 |
X |
1 |
X |
1 |
0 |
1 |
1 |
1 |
0 |
X |
0 |
1 |
X |
X |
1 |
1 |
1 |
0 |
1 |
1 |
1 |
X |
0 |
X |
0 |
1 |
X |
1 |
1 |
1 |
0 |
0 |
0 |
X |
1 |
X |
1 |
X |
1 |
K Map Simplification
Components and Equipments:
DC Power supply, Clock generator, LEDs, IC 7476 - 2 No's, 2-input AND gate
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