Question

1. In a counter, a flip-flop output 10. A is a group of flip-flops, each one of which transition serves as a source for triggering other flip-flops, not by the common clock pulses. shares a common clock and is capable of storing one bit of information. A) RAM B) latch A ripple Cring (rather than signal transitions) are referred to as B synchronous D binary C) counter D) register 11. The Characteristic Equation of JK flip-flop is 2. Storage elements that operate with signal levels registers C) latches flip-flops D) DRAMs 12. Refer to Prob. 18 and using JK flip-flops in the design, the excitation input to/BKB when ABCX = 0110 is 3. Refer to Prob. 25, considering the unused states as 'don't care' conditions, the state equation for DBis 13. The excitation input for JK flip-flop so that the its C DB AB'+A'B state changes from 0 → 1 4. Refer to Prob. 22, if the present state and input is ABx 110, then the next state, A*B is 14. Refer to Prob. 18 and using Tflip-flops in the design, the excitation input to TA when ABC x = 1001 is 5. The storage elements (memory) used in clocked sequential circuits are called A) flip-flops. C) DRAMs. B registers. D) latches. 15. In a counter, a common clock triggers all flip-flops simultaneously A ripple O synchronous state changes from 0-0 @o=0 6. The excitation input for JK flip-flop so that the its B ring state changes from 0-0 16. The excitation input for D flip-flop so that the its 7. Refer to Prob. 25, considering the unused states as 'don't care' conditions, the state equation for DAis b) DA=A+A'B' g) DATA+A'B' (D) DA=AB+AB 17. The excitation input for JK flip-flop so that the its state changes from 1-0 8. Ina model, the outputs of the sequential circuit are synchronized with the clock, because they depend only on flip-flop outputs that are synchronized with the clock. B Moore D) Shannon model, the outputs may C) Armstrong 9. Ina change if the inputs change during the clock cycle. A) Moore B Shannon Armstrong

hi i need answers for nos. 18-28.

Answer 1