4. (a) Translate the following pseudo-code into MIPS
assembly code. Assume that A, B, C are arrays of size N elements,
indexed 0..N-1
I=I;
WHILE(I<N AND A[I]<B[I])
C[I] = A[I] + B[I-1]
4. (a) Translate the following pseudo-code into MIPS assembly code. Assume that A, B, C are...
C code to MIPS Translate the following C command into MIPS assembly. Assume that the base address of arrays A is stored in register $s1. 시 I-A[2] + 7;
Translate the following C code to MIPS assembly. Assume that the values of a, b, i, and j are in registers $s0, $s1, $t0, and $t1, respectively. Also assume that $s2 holds the base address of the array D. for (i = 0: i < a: i++) for (j = 0: j < b: j++) D[2 * j] = i + j;
Translate the following C code to MIPS assembly code. Assume that the value of i is in register $t0, and $s0 holds the base address of the integer MemArray if (i > 10) MemArray[i] = 0; else MemArray[i] = -MemArray[i];
IN MIPS AND MUST RUN IN QTSPIM Translate the following C code to MIPS assembly code. Use a minimum number of instructions. Assume that the values of a, b, i and j are stored in registers Ss0, Ss1, St0 and Stl, respectively. Also assume that register Ss2 holds the base address of the array D. for (i=0; i<a; itt) for (i-0j<b:jt+)
2.9 5 $2.2, 2.3> Translate the following C code to MIPS. Assume that the variables f, g, h, i, and j are assigned to registers $s0, $s1, $s2, $s3, and $s4, respectively. Assume that the base address of the arrays A and B are in registers $s6 and $s7, respectively. Assume that the elements of the arrays A and B are 4-byte words: fAlBg
7. Translate the following C code to MIPS assembly code. Use a minimum number of instructions. Assume that the values of a,b, i and j are in registers Ss0, Ss1, St0, and St1, respectively. Also, assume that register SS2 holds the base address of the array D. for(i-0; i<a; i++) for(j=0 ; j<b; j++)
its brr[8] (40%) Convert the following C-pseudo code into MIPS assembly code as a standalone program (including main and all the required directives). You can use any register. You must comply, however, with the convention of register usage. Before writing your code perform an explicit register allocation phase. Note that the C snippet is int arr[8]; int brr[4]-{1, 2, 3, 4, 5, 6, 7, 8) int i-8; while (i>-0) arrli]-brr[i-); (40%) Convert the following C-pseudo code into MIPS assembly code...
Translate the following C code to MIPS assembly code. Use a minimum number of instructions. Register allocations - i $s0 - j $s1 - base of A[] $s2 - base of B[] $s3 2) A[3] = B[i] + B[j]; 3) i = 0; while (j != A[i]) { i++; }
Translate each of the following pseudo-instructions into MIPS instructions. You should Produce a minimal sequence of MIPS instructions to accomplish the required computation. (8 Points) 1) bgt $t1, 100, Label # bgt means branch if greater than 2) ble $s2, 10, Next # ble means branch if less than or equal 3) ror $s0, $s4, 7 # ror means rotate right $s4 by 7 bits and store the result in $s0 4) neg $s5, $s4 # $s5 will have the...
6. Write the MIPS assembly code that corresponds to the pseudo code below. Assume that the address for integer i is baseaddress+4 and the address for a[0] is baseaddress+8. Assume that the baseaddress is stored in $gp. The code initializes i to O; it then iterates from i-0 to i-9, setting a4i in each iteration. To make your code efficient, i must be loaded into a register at the start, and it must be updated in memory only after you've...