Question

Please evaluate and explain the following statements:

f. On an ARM Cortex M4, if two interrupts with priority numbers 0 and 1 occur simultaneously, the
interrupt controller (permanently) clears the one numbered 1 and passes the one numbered 0
to the CPU.
g. Level 0 is the highest (most urgent) interrupt priority on the Cortex M4.
h. An ISR can return a value and take arguments
i. It is OK for an ISR to safely access the SPI bus that has multiple slaves.

Answer 1

Answer :- f) When two interrupts occur simultaneously, the high priority interrupt i.e. interrupt zero is served first and on the completion of ISR for interrupt zero, interrupt one is served. So in this case nested-interrupt is being used.

Answer :- g) Level -3 i.e. power on reset is the highest priority interrupt in cortex-M4.

Answer :- h) ISR does not return value and does not take arguments. They are called by CPU when interrupt occurs.

Answer :- i) It may happen that SPI bus is being used by the master with other slave, so bus may not be available.