1.Write the "destination" register in the instruction 671A in a string of 4 bits.
2.The instruction 9158 uses two registers as operands, and a
third register as a destination for the result.
Which registers are used for the operands?
9 and 1 |
||
1 and 5 |
||
5 and 8 |
||
9 and 8 |
3. Translate the following instruction into English: 54F2
Add the bit patterns in registers F and 2 together as if they were presented in two's complement and leave the result in register 4. |
||
Add the bit patterns in registers F and 2 together as if they were presented in two's complement and leave the result in register 5. |
||
Add the bit patterns in registers F and 2 together as if they were presented in floating-point notation and leave the result in register 4. |
||
Add the bit patterns in registers F and 2 together as if they were presented in floating-point notation and leave the result in register 5. |
4. Translate the following English phrase into a machine language instruction:
Place the hexadecimal value 34 into register 9.
5.Translate the following English phrase into a machine language instruction:
Place the byte value stored at memory cell 34 into register 9.
Answer is as follows :
1) As we have 671A where 6 set for instruction, 7 for destination register, 1 & A for source register.
So destination register is 7
2) In given Machine language 5 and 8 are two operand registers. Operand registers are also known as source register.
So option C is correct.
3) As we have instruction 54F2, which perform addition of contents present in register F and 2 and store the result in register 4.
All the operation done with integer values or they may get result with 2's complement. Destination register is 4 here.
So correct option is A
4) For placing the hexadecimal value 34 to register 9, we use the simple LOAD instruction with opcode 2. Opcode define the which instruction will be performed. And opcode is 2 here
So machine language instruction is 2934
Where 9 is destination register and 34 is data
5) For placing the value of memory cell 34 to register 9, we use the memory LOAD instruction with opcode 1. Opcode define the which instruction will be performed. And opcode is 1 here.
So machine language instruction is 1934
Where 9 is destination register and 34 is memory cell.
if there is any query please ask in comments...
1.Write the "destination" register in the instruction 671A in a string of 4 bits. 2.The instruction...
High-level computer languages are created to be understood by humans. As a result, the keywords and the commands of these languages are easy to understand. Machine languages are harder to understand and operate. For this assignment, you should assume that the memory cells at addresses F0 to F9 are in the machine described in FIGURE 1, and that it contains the hexadecimal bit patterns described in the following table. Note: Each memory address contains 2 values that must be used...
Exercise 1 (9 pts) We have seen that ARM has 16*32 bits registers (plus floating point registers) There is also a status register: CPSR. It contains, among other things, the following important status bits N Negative, set when the result of an arithmetic operation is negative (according to the two's complement encoding of the natural numbers . Z- Zero, set when the result of an operation is zero . C Carry, set when an operation results in a carry bit...
QUESTION 5 What result will be in AVR registers r16, r18 and the status register (Z, C, N, V bits) after the execution of all of the following AVR assembly language instructions: Idi r16, 77 Idi r17, OxAB ldi r18, 34 and r16, r17 add r18, r17 Your answers should consist of binary digits only (0's and 1's)- your r16 and r18 values should show 8 binary digits; your status register values should be shown with a single bit. r16:...
Op-code Operand Description 1 RXY LOAD register R from cell XY 2 RXY LOAD register R with value XY 3 RXY STORE register R in cell XY 4 0RS MOVE R to S 5 RST ADD S and T into R (2’s comp.) 6 RST ADD S and T into R (floating pt.) 7 RST OR S and T into R 8 RST AND S and T into R 9 RST XOR S and T into R A R0X ROTATE...
The AVR provides a rich instruction set to support high-level languages. The AVR address- ing modes also simplify the access of complex data structures. The AVR has a version of the ADD instruction that includes the C flag as one of the source operands, which enables multiple- precision addition operation. The AVR also has a version of the SUB instruction that includes the C flag as one of source operands and hence is used to perform multiprecision subtraction operation. The...
Add 9 MUX 4 4 Addresult ALU Shift left 2 RegDst Branch MemRead Instruction (31-26) Control Memto Reg ALUOD MemWrite ALUSC RegWrite Instruction [25-21) Read PC Read address register 1 Read Instruction (20-16] MUX1 MUX Zero ALU ALU MUX3 M Instruction (31-0) Instruction memory Road Address data Read data 1 register 2 Write Read register data 2 Write data Registers result Instruction (15-11] Fox SX) Data Write data memory 16 32 Instruction (150) Sign- extend ALU control Instruction (5-0)
Assume that ‘slt $1, $2, $3’ is executed with the implementation in the picture. Identify the value of the 9-bit control signals. Add u X ALU result 4 Add Shift left 2 RegDst Branch MemRead MemtoReg Control ALUOP Instruction [31-26 MemWrite ALUSRC RegWrite Instruction [25-21] Read register 1 Read Read PC address Instruction [20-16] data 1 Read Zero register 2 Instruction ALU ALU 31-0] Instruction memory Read data M Read Address Write result u M Instruction [15-11] register data 2...
Question 5 0.25 pts What is the value of the MemWrite control signal? Question 6 0.25 pts What is the value of the ALUSrc control signal? Add Add Sum--(1 4 Shift left 1 Branch MemRead Instruction [6-0] ControMemtoReg MemWrite ALUSrc RegWrite Instruction [19-15]Read Read register 1 Read Read data! PCaddress Instruction [24-20] Zero ALU ALU result register 2 Instruction 31-0 Instruction [11-7 Read1 Address data | Write Read register daiaALU | M Instruction memory Write data Registers Write Data data...
1. (15 pts) For the following C statement, what is the corresponding MIPS assembly code? Assume f, g, h correspond to $80, $s1, and $s2, respectively. f=g+(h-5) 2. (15 pts) For the following pseudo-MIPS assembly instructions, what is the corresponding C code? add f, g, h add f,i, f 3. (30 pts) Provide the instruction type, assembly language instruction, and binary representation of the instruction described by the following MIPS fields: a. op = 0, rs = 18, rt=9, rd...
Use this bit of code for questions 1 and 2. add $5, $7, $2 sw $9, 4($6) lw $4, 8($12) or $6, $5, $3 Assume that the code is stored starting at 0x00600000, the values in the memory are all initially -1, and the register values are the same as the number (so $5 holds the value 5). Using the pipelined diagram, give the contents of each internal register at the end of the 4th clock...