Suppose you have a memory system using fixed-size partitions with all partitions the same size, 216 bytes and a total main memory size of 227 bytes. In the process table there is a pointer to a partition for each resident process. How many bits are needed for this pointer?
Suppose you have a memory system using fixed-size partitions with all partitions the same size, 216...
Consider a fixed partitioning scheme with equal-size partitions of 216 bytes and a total main memory size of 224 bytes. A process table is maintained that includes apointer to a partition for each resident process. How many bits are required for the pointer?
Suppose we have 2^20 bytes of virtual memory and 216 bytes of physical main memory. Suppose the page size is 2^8 bytes. a) How many pages are there in virtual memory? b) How many page frames are there in main memory? c) How many entries are in the page table for a process that uses all of virtual memory?
Suppose we have 212 bytes of virtual memory and 27 bytes of physical main memory. Suppose the page size is 24 bytes. a) How many pages are there in virtual memory? b) How many page frames are there in main memory? c) How many entries are in the page table for a process that uses all of virtual memory?
Consider a simple paging system with the following parameters: 232 bytes of physical memory; page size of 210 bytes; 216 pages of logical address space. How many entries in the page table? How many bits in each page table entry? Assume each page table entry contains a valid/invalid bit.
In a system employing a memory management strategy that doesn't require an entire process to be in main memory at one time; the portion of a process that is actually in main memory at any given time is defined to be the resident set of the process. True False The modify (M) bit is a control bit in a page table entry that indicates whether the contents of the corresponding page have been altered since the page was last loaded...
Exercise l: Suppose that we have a virtual memory space of 28 bytes for a given process and physical memory of 4 page frames. There is no cache. Suppose that pages are 32 bytes in length. 1) How many bits the virtual address contain? How many bits the physical address contain? bs Suppose now that some pages from the process have been brought into main memory as shown in the following figure: Virtual memory Physical memory Page table Frame #...
QUESTION 2 Suppose a computer using direct mapped cache has 216 bytes of byte-addressable main memory and a cache of 64 blocks, where each cache block contains 32 bytes. a. How many blocks of main memory are there? b) What is the format of a memory address as seen by the cache, (include field names and their sizes) c) To which cache block will the memory address (F8C916 map? What address in that block does it map to?
You have a processor that supports virtual memory. The page size used for the virtual memory is 16 KiBytes, The virtual address size is 24 bits. Each table entry is 2 bytes. How many pages will the processor support? ___ How big is the page table (assume a single level page table) ___
A computer uses a byte-addressable virtual memory system with a four-entry TLB and a page table for a process P. Pages are 16 bytes in size. Main memory contains 8 frames and the page table contains 16 entries. a. How many bits are required for a virtual address? b. How many bits are required for a physical address?
1. Consider a simple paging system with the following parameters: 232 bytes of physical memory; page size of 210 bytes; 216 pages of logical address space. How many bits are in a logical address? How many bytes are in a frame! How many bits in the physical address specify the frame? How many entries are in the page table? How many bits are in each page table entry? Assume each page table entry contains a valid/invalid bit. 2. Consider a...