Suppose we add another SRC instruction xor ra, rb, rc that xors the contents of registers...
Suppose we add another SRC instruction xor ra, rb, rc that xors the contents of registers rb and rc and stores the result in register ra. Develop a concrete RTN and a control sequence for this instruction. Note that the SRC ALU does not have an XOR operation, so you will have to design it using the AND, OR and other operations.
Homework Answers
In the above, concrete RTN and a control sequence for each instruction.
- First three T0, T1 and T2 are instruction fetch process.
- And T3, T4 and T5 are the execution of the each logical operation.
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Suppose we add another SRC instruction xor ra, rb, rc that xors
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