Question

Write a Verilog program that tests whether a 4-bit input variable is a Fibonacci number or not. Please attach your Verilog code to your submission. Also include a screenshot of your Verilog code, as well as your program execution result as an answer to this question.

Answer 1

Answer 1)

Truth Table for the fibbonacci circuit is mentioned below:-

Verilog Code:-

// Fibonacci series upto 4 bits is ::: 0 1 2 3 5 8 13

module FibCircuit (A3, A2, A1, A0, Y);
input A3, A2, A1, A0;
output reg Y;

always @(A3, A2, A1, A0)
begin
case ({A3, A2, A1, A0})
4'd0 : Y = 1'b1;
4'd1 : Y = 1'b1;
4'd2 : Y = 1'b1;
4'd3 : Y = 1'b1;
4'd4 : Y = 1'b0;
4'd5 : Y = 1'b1;
4'd6 : Y = 1'b0;
4'd7 : Y = 1'b0;
4'd8 : Y = 1'b1;
4'd9 : Y = 1'b0;
4'd10 : Y = 1'b0;
4'd11 : Y = 1'b0;
4'd12 : Y = 1'b0;
4'd13 : Y = 1'b1;
4'd14 : Y = 1'b0;
4'd15 : Y = 1'b0;
default : Y = 1'b0;
endcase
end

endmodule

TESTBENCH:-

module FibCircuit_tb;
reg A3, A2, A1, A0;
wire Y;
integer i;

FibCircuit DUT (.A3(A3), .A2(A2), .A1(A1), .A0(A0), .Y(Y));

initial
begin
$monitor("A3 = %d, A2 = %d, A1 = %d, A0 = %d, Y = %d", A3, A2, A1, A0, Y);
for (i = 0; i < 16; i = i + 1) begin
{A3, A2, A1, A0} = i ; #10;
end
end

endmodule

/************ Output of Program ******************
A3 = 0, A2 = 0, A1 = 0, A0 = 0, Y = 1
A3 = 0, A2 = 0, A1 = 0, A0 = 1, Y = 1
A3 = 0, A2 = 0, A1 = 1, A0 = 0, Y = 1
A3 = 0, A2 = 0, A1 = 1, A0 = 1, Y = 1
A3 = 0, A2 = 1, A1 = 0, A0 = 0, Y = 0
A3 = 0, A2 = 1, A1 = 0, A0 = 1, Y = 1
A3 = 0, A2 = 1, A1 = 1, A0 = 0, Y = 0
A3 = 0, A2 = 1, A1 = 1, A0 = 1, Y = 0
A3 = 1, A2 = 0, A1 = 0, A0 = 0, Y = 1
A3 = 1, A2 = 0, A1 = 0, A0 = 1, Y = 0
A3 = 1, A2 = 0, A1 = 1, A0 = 0, Y = 0
A3 = 1, A2 = 0, A1 = 1, A0 = 1, Y = 0
A3 = 1, A2 = 1, A1 = 0, A0 = 0, Y = 0
A3 = 1, A2 = 1, A1 = 0, A0 = 1, Y = 1
A3 = 1, A2 = 1, A1 = 1, A0 = 0, Y = 0
A3 = 1, A2 = 1, A1 = 1, A0 = 1, Y = 0
**********************************************/