Question

Design the following Circuit Using LASI and Test them using WinSpice.

Design the following gates:

2 Input NOR

2 Input AND

2 Input OR

For each of the circuit please show the following:

LASI Layout

.DRC Rule Check

CKT check

Winspice waveform

It is a VLSI question.

You don't have to do the Winspice part. But the layout would be helpful please.

Answer 1

You can generate Layout following DRC rules using L-edit and extract SPICE Netlist from it.. Next step is to verify whether Netlist exported from S-Edit /T-edit is same or not . It can be done using LVS tool. LVS tool ill compare S-edit T-edit netlist and L-edit netlist .

You can follow the steps given below:

1) Start – All Programs – Tanner EDA – Tanner Tools v12.6 – L-Edit v12.6

b) Create a new layout design:

- File – New

- select “Layout”

- under “Copy TDB...”, browse to:

\Tanner_Projects\Generic_025_Kit\Generic_025.tdb

- Click “OK”

When you copy in the Generic_025.tbd files, it loads all of the layer definitions for the 0.25um process and the design rule information. On the left, you should see a set of layers for this technology that can be used to create devices.

c) Verify the technology rule options & setup grid

- Setup – Design

Now you want to setup the grid. Click on the “Grid” tab. Since we are using a 0.25um grid, let’s put our major grid and snap grid at 0.125um. Then we will put our minor grid at 0.05. Enter the following:

Now let’s configure the ruler settings. When you draw polygons to implement your circuitry, you will continually be measuring your shapes to make sure they are what you want. You can place items called “rulers” that will show how large your shapes are.Clickon the “Drawing” tab and configure the “Display Text” to “Centered”.

d) Save your design

- Now you can click “save” and give your design a descriptive name and location.

(i.e., \Tanner_Projects\New”

Part 2: Inspect the design rules for the kit

The design rules for this kit were loaded when you specified the Generic 0.25um design kit. L-edit will check for violations in the design rules using a process called Design Rule Check (DRC). To see the rules, use the pull down menus:

- Tools – DRC Setup

- You’ll see that the “DRC Standard Rule Set” is selected. Highlight this (if it isn’t already) and click the

“Edit” Button:

At this point, the only rule that makes much sense is the minimum gate length. If you click on Rule 3.1. Poly Minimum Width, you’ll see that a DRC error will occur if you draw a shape on the Poly layer that is less than 0.25um in width. As you can also see, there are rules that govern all of the layers in the design kit. - Once you look at the rules, click “OK” to go back to the “Setup DRC” dialog and check the “Pop up message box” so that you can see the results of the rule checking.