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The CPSR provides details on the current program status. Show the values of the least significant...

The CPSR provides details on the current program status. Show the values of the least significant 10 bits of this register during the following status:

a) The program is performing an FIQ

b) The program is performing an IRQ with Thumb instructions

c) The program encountered an invalid address during a load/store instruction

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Answer #1

)Solution :-

Mode(M0) Mode(M1) Mode(M2) Mode(M3) Mode(M4) Thumb FIRQ IRQ

Asynchronous abort mask bit

Endianness

(Little or Big Endian)
0 1 2 3 4 5 6 7 8 9
1 1 0 1 0 1 1 1 1 0

Here in the table first row says about Function , second row is bit number and third row corresponds to bit value (1 or 0)

Here Processor mode is FIQ so Mode bits ore 0x11 as per arm manual. And Thumb, FIRQ and IRQ bits are set as per given details in the question. Asynchronous abort mask bit is set because of program encountered an invalid address during a load/store instruction. By default processor is in Little Endian mode so Endianness bit is Reset.

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