Question

all witworDFFs, FFI and FFo, two 4xI multiplexers, four 2-bit registers (Ro, RI, R2, and R3; all I with p arallel outputs) and no additional logic gates, design a circuit to support the following operations based on 2-bit inputs M1 and MO M1 MO values Operation (at the rising edge of the clock) RO FF1 FFO (bits of RO stored in FF1&FFO IFF1 FFO (bits of R1 stored in FF1&FFO R2 FF1 FFO (bits of R2 stored in FFI &FFO R3FF1 FFO (bits of R3 stored in FF1 &FFO 0 1 0 d. Design a 2-bit synchronous binary counter that counts-down when the input D when D -0 (no need to draw the circuit, only derive the flip-flop equations) 1 and counts up without using additional logic gates. Indicate all inputs, outputs and necessary connections. (15 points) ICO: 7] lize the following functions of 5 variables (A, B, C, D, E) F1-(A'B'C+ABCABC) D'E

Answer 1

Given to desma cit aut using 2D-FFS, fFiaod FFo,Luy, Multiplexe - veistexs (Ro, R\ ,2,) clock edae ciabon (at the Yįsi RO→ FFi FFO (bits 01 RO stoved in FFI RFFO)

T14#1 Mi MO Mi Mo Stalld9lasn (Foy design of -bit up down Count 01 Staie Tablu Pr esent state D-flipflop i pit Next state DI DO PO 0 0

Minmization usina K-Mo.ps OP S DI 11 (c