Question

The assignment is build an 8 bit ALU in structural verilog NOT behavioral :

Requirements are to design the ALU to implement

NAND, AND, OR, NOT, XOR, XNOR, ADD, SUBTRACT, COMPARE, etc. WIll be executed on 2s complemented throughout.

15 Op codes necessary are the following:

-Transfer A

-Increment A

-Addition

-Subtraction

-Decrement A

-1s comp

-A and B,A NAND B,A or B, A NOR B, A XOR B, A XNOR B,

-A greater than B

-A Les than B

-A equal to B

My question is, how to I start this design, I know that I need to build individual design block in structural verilog for each block, but I do not know how to approach the entire thing, seems alot more confusing than it needs to be. Just confused on the accumulator logic, control logic an MUX on how to piece it together.

Answer 1

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