Question

a) Describe the main techniques used by superscalar processors to achieve a high degree of machine-level parallelism.

Consider the following assembly code: I1: LOAD r3 (r1) TO 12: MOVE r4 #1 13: ADD r3 r3 r4 I4: LOAD r2 (r2) 15: MOVE r4 #2 I6: MUL r2 r2 r4 17: MUL r3 r3 r2 I8: LOAD r4 (r1) 19: MOVE r1 #3 I10: ADD r4 r4 r1 I11: MUL r3 r3 r4 Using register renaming reorganise the code from the previous question and the pipeline activity when it is executed on a superscalar processor. There are three pipeline stages: fetch-decode, execute and write-back. There are two units for each of fetch-decode, execute (one adder and one multiplier) and write-back (b) (14 marks)

Answer 1

data handleint o text Io PuShi S- Coll -etstd Hardle y hard le mov -.ean· Pushl $o msa Coll _ white console A0% Push 6 Call Ext Phocesup