Question

Consider the following assembly code: I1: LOAD r3 (r1) TO 12: MOVE r4 #1 13: ADD r3 r3 r4 I4: LOAD r2 (r2) 15: MOVE r4 #2 I6:

a) Describe the main techniques used by superscalar processors to achieve a high degree of machine-level parallelism.

Using register renaming reorganise the code from the previous question and the pipeline activity when it is executed on a sup
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