A large chip has a nominal power consumption of 60 W, of which 20 is leakage. The effective channel length is 40 nm, with a 4 nm standard deviation from die to die and a 3 nm standard deviation for uncorrelated random within-die variation. The threshold voltage has a 30 mV standard deviation caused by random dopant fluctuations. It also has a sensitivity to channel length of 2.5 mV/nm caused by shortchannel effects. The subthreshold slope is 100 mV/decade. Estimate the maximum power that should be allowed to achieve an 84% parametric yield.
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