10.4 Consider the CMOS SRAM cell drawn in Fig. P10.4. Transistors M1 and M2 have W/L value...

10.4 Consider the CMOS SRAM cell drawn in Fig. P10.4. Transistors M1 and M2 have W/L values of 4/4. Transistors M3 and M4 have W/L values of 2/4. M5 and M6 are to be sized such that the state of the cell can be changed for V_c ≤ 0.5 V. Assuming that M5 and M6 are the same size, calculate the required W/L. Use the following parameter:

•V_T0,n = 0.7 V

• V_T0,p = -0.7 V

• k′_n=20 μA/V²

• k′_p=10 μA/V²

• γ = 0.4 V^1/2

• |2φ_F| = 0.6 V

Figure P10.4