(Xilinx CLB) The Xilinx look-up table can implement any single combinational logic function F(A,B,C,D) of four variables.
(a) Show how this might be implemented by wiring up a 16-input function generator (multiplexer/selector) using two 8:1 and a single 2:1 multiplexers. Assume that input0 is selected when ABCD = 00000, input15 when ABCD = 1111, and input8 when ABCD = 1000.
(b) What must the input settings be to implement the four- variable function F = A ⊕ B ⊕ C ⊕ D?
(c) What must the input settings be to implement the two 3-variable functions F(A,B,C)= A ⊕ B ⊕ C (full-adder sum) and G(A,B,C)= A · B + B · C + A · C (full-adder carry)?
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