Question

We need to design a four-bit binary synchronous down counter using JK flip-flop. I'd appreciate it if you could draw the truth and logic.

Answer 1

Four bit binary 6-5743) synchronous clown counter Initial state 15 14-113–1271110-9-8-7-6+5+4+3- O alta Truth Table prosent stato Noxt stewo actul) FF inputs Qlt) QB Qc QD QA QB QC OD J Jk FF Truth Table J QCHI) Qit) - С Qit) -

Present state (QH) Next stato FF inputs To to TB kg Qө Qв дс Р QA Qc с ис JD KD — x О хо хо — — - X т ЎО — х) 1 x — X хо x 1 о 1 Х TX — — — о 1 о от о О. ( ООО ох ох х 1 С ) У Ох хо хо то с о то 1 хо ох X о - ту 0 x хо о то ОХ - ох Х 0 0 1 OX

ko JA 10 Choclacap Oo JA=1 00 2 el 01 c х X X U 13 IS 12 X Х lo 1 KA. = BA JB KB 01. 11 01 10 00 onor OCOD 00 QAQB|QCUD 00 D 00 1 Х 01 * xxx 10 X 12 15 11 X Х Xio XX 10 8 9 - 10 KB = OBOCOD JB = QA ko 01 00 10 01 00 ONO QcKD Х 2 2 QROBLQCOD o 00 X2 3 To 00 au X X.ro 07 Yu 0) 13 X5 1 13 10 CO Kc = OB QD +QAQD = Q(QA+08) J = QAQCQD +QBQD (1 LO 00 QhAR\oc OD 10 N X ONOS) OCOD 1 Х 1 х 00 XX Х X 1 01 1 х X 11 x (0 KD:QD TD=AD

logic diagram AJA JB QB fJc Jo 90 Cl6 Sko KA QC QA KB QB