(a)What is the average memory access time (AMAT) if a cache uses write-back strategy and 20% of the data blocks to be swapped out are dirty. Assume that the miss rate is 15%, the hit time of the cache is 1 cycle and the miss penalty is 8 cycles for the data blocks that are not dirty and 20 cycles for those blocks that are dirty.
(b) What is the speedup up if we add a “write-buffer” that eliminates 40% of the stall cycles to write back the dirty blocks?
Whenever we miss, we must get the required block from memory
incurring a 8 cycle penalty.
In 20% of the cases the replaced block will be dirty which means
that we incur a 20 cycle
penalty to write the dirty block out to memory.
So, the miss penalty is 8 + (20%) * 100 = 9.6 cycles.
average memory access time = Hit time + (Miss rate x Miss penalty)
Hit time=1 cycle miss rate=20% miss penality is 9.6 cycles
AMAT = 1+(20%*9.6)=2.92
1+(1.92)=2.92
(a)What is the average memory access time (AMAT) if a cache uses write-back strategy and 20%...
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